diff mbox series

MAINTAINERS: correct my email address

Message ID 20241209181242.1434231-1-brian.cain@oss.qualcomm.com (mailing list archive)
State New
Headers show
Series MAINTAINERS: correct my email address | expand

Commit Message

Brian Cain Dec. 9, 2024, 6:12 p.m. UTC
Mea culpa, I don't know how I got this wrong in 2dfe93699c.  Still
getting used to the new address, I suppose.  Somehow I got it right in the
mailmap, though.

Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
---
 MAINTAINERS | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Peter Maydell Dec. 13, 2024, 3:37 p.m. UTC | #1
On Mon, 9 Dec 2024 at 18:12, Brian Cain <brian.cain@oss.qualcomm.com> wrote:
>
> Mea culpa, I don't know how I got this wrong in 2dfe93699c.  Still
> getting used to the new address, I suppose.  Somehow I got it right in the
> mailmap, though.
>
> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>



Applied to target-arm.next, thanks.

-- PMM
Philippe Mathieu-Daudé Dec. 13, 2024, 7:16 p.m. UTC | #2
On 9/12/24 19:12, Brian Cain wrote:
> Mea culpa, I don't know how I got this wrong in 2dfe93699c.  Still
> getting used to the new address, I suppose.  Somehow I got it right in the
> mailmap, though.
> 
> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
> ---
>   MAINTAINERS | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)

Queued, thanks!
Philippe Mathieu-Daudé Dec. 13, 2024, 11:29 p.m. UTC | #3
On 13/12/24 20:16, Philippe Mathieu-Daudé wrote:
> On 9/12/24 19:12, Brian Cain wrote:
>> Mea culpa, I don't know how I got this wrong in 2dfe93699c.  Still
>> getting used to the new address, I suppose.  Somehow I got it right in 
>> the
>> mailmap, though.
>>
>> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
>> ---
>>   MAINTAINERS | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> Queued, thanks!

Dropped, already taken by Peter.
diff mbox series

Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index aaf0505a21..a338a8bbcc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -226,7 +226,7 @@  F: target/avr/
 F: tests/functional/test_avr_mega2560.py
 
 Hexagon TCG CPUs
-M: Brian Cain <bcain@oss.qualcomm.com>
+M: Brian Cain <brian.cain@oss.qualcomm.com>
 S: Supported
 F: target/hexagon/
 X: target/hexagon/idef-parser/