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[82.218.84.190]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aa692e4e9d5sm141783566b.129.2024.12.09.12.37.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Dec 2024 12:37:10 -0800 (PST) From: phil@philjordan.eu To: qemu-devel@nongnu.org Cc: Cameron Esfahani , Roman Bolshakov , "Michael S. Tsirkin" , Paolo Bonzini , Marcel Apfelbaum , Alexander Graf , Peter Maydell , qemu-arm@nongnu.org, Phil Dennis-Jordan Subject: [PATCH 11/11] hw/intc/apic: Raise exception when setting reserved APICBASE bits Date: Mon, 9 Dec 2024 21:36:29 +0100 Message-Id: <20241209203629.74436-12-phil@philjordan.eu> X-Mailer: git-send-email 2.39.3 (Apple Git-146) In-Reply-To: <20241209203629.74436-1-phil@philjordan.eu> References: <20241209203629.74436-1-phil@philjordan.eu> MIME-Version: 1.0 Received-SPF: neutral client-ip=2a00:1450:4864:20::629; envelope-from=phil@philjordan.eu; helo=mail-ej1-x629.google.com X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NEUTRAL=0.779 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Phil Dennis-Jordan Signed-off-by: Phil Dennis-Jordan --- hw/intc/apic.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/intc/apic.c b/hw/intc/apic.c index d72cbb2a8f..83e626a45e 100644 --- a/hw/intc/apic.c +++ b/hw/intc/apic.c @@ -309,6 +309,11 @@ bool is_x2apic_mode(DeviceState *dev) static int apic_set_base_check(APICCommonState *s, uint64_t val) { + /* Refuse to set reserved bits */ + if (val & MSR_IA32_APICBASE_RESERVED) { + return -1; + } + /* Enable x2apic when x2apic is not supported by CPU */ if (!cpu_has_x2apic_feature(&s->cpu->env) && val & MSR_IA32_APICBASE_EXTD) {