diff mbox series

[22/71] hw/cpu: Constify all Property

Message ID 20241213190750.2513964-27-richard.henderson@linaro.org (mailing list archive)
State New
Headers show
Series whole-tree: Constify Property structures | expand

Commit Message

Richard Henderson Dec. 13, 2024, 7:06 p.m. UTC 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 hw/cpu/a15mpcore.c       | 2 +-
 hw/cpu/a9mpcore.c        | 2 +-
 hw/cpu/arm11mpcore.c     | 2 +-
 hw/cpu/cluster.c         | 2 +-
 hw/cpu/realview_mpcore.c | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

Comments

Zhao Liu Dec. 18, 2024, 3:20 p.m. UTC | #1 
On Fri, Dec 13, 2024 at 01:06:56PM -0600, Richard Henderson wrote:
> Date: Fri, 13 Dec 2024 13:06:56 -0600
> From: Richard Henderson <richard.henderson@linaro.org>
> Subject: [PATCH 22/71] hw/cpu: Constify all Property
> X-Mailer: git-send-email 2.43.0
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  hw/cpu/a15mpcore.c       | 2 +-
>  hw/cpu/a9mpcore.c        | 2 +-
>  hw/cpu/arm11mpcore.c     | 2 +-
>  hw/cpu/cluster.c         | 2 +-
>  hw/cpu/realview_mpcore.c | 2 +-
>  5 files changed, 5 insertions(+), 5 deletions(-)
> 

Hope I'm not late :-)

Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
diff mbox series

Patch

diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c
index 967d8d3dd5..5346b8b6c6 100644
--- a/hw/cpu/a15mpcore.c
+++ b/hw/cpu/a15mpcore.c
@@ -144,7 +144,7 @@  static void a15mp_priv_realize(DeviceState *dev, Error **errp)
     }
 }
 
-static Property a15mp_priv_properties[] = {
+static const Property a15mp_priv_properties[] = {
     DEFINE_PROP_UINT32("num-cpu", A15MPPrivState, num_cpu, 1),
     /* The Cortex-A15MP may have anything from 0 to 224 external interrupt
      * IRQ lines (with another 32 internal). We default to 128+32, which
diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c
index c30ef72c66..c3fdfb92e1 100644
--- a/hw/cpu/a9mpcore.c
+++ b/hw/cpu/a9mpcore.c
@@ -158,7 +158,7 @@  static void a9mp_priv_realize(DeviceState *dev, Error **errp)
     }
 }
 
-static Property a9mp_priv_properties[] = {
+static const Property a9mp_priv_properties[] = {
     DEFINE_PROP_UINT32("num-cpu", A9MPPrivState, num_cpu, 1),
     /* The Cortex-A9MP may have anything from 0 to 224 external interrupt
      * IRQ lines (with another 32 internal). We default to 64+32, which
diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c
index 89c4e35143..193fc182ab 100644
--- a/hw/cpu/arm11mpcore.c
+++ b/hw/cpu/arm11mpcore.c
@@ -131,7 +131,7 @@  static void mpcore_priv_initfn(Object *obj)
     object_initialize_child(obj, "wdtimer", &s->wdtimer, TYPE_ARM_MPTIMER);
 }
 
-static Property mpcore_priv_properties[] = {
+static const Property mpcore_priv_properties[] = {
     DEFINE_PROP_UINT32("num-cpu", ARM11MPCorePriveState, num_cpu, 1),
     /* The ARM11 MPCORE TRM says the on-chip controller may have
      * anything from 0 to 224 external interrupt IRQ lines (with another
diff --git a/hw/cpu/cluster.c b/hw/cpu/cluster.c
index 61289a840d..8e43621b5c 100644
--- a/hw/cpu/cluster.c
+++ b/hw/cpu/cluster.c
@@ -25,7 +25,7 @@ 
 #include "hw/qdev-properties.h"
 #include "qapi/error.h"
 
-static Property cpu_cluster_properties[] = {
+static const Property cpu_cluster_properties[] = {
     DEFINE_PROP_UINT32("cluster-id", CPUClusterState, cluster_id, 0),
     DEFINE_PROP_END_OF_LIST()
 };
diff --git a/hw/cpu/realview_mpcore.c b/hw/cpu/realview_mpcore.c
index 72c792eef1..9a0ff1df86 100644
--- a/hw/cpu/realview_mpcore.c
+++ b/hw/cpu/realview_mpcore.c
@@ -108,7 +108,7 @@  static void mpcore_rirq_init(Object *obj)
     }
 }
 
-static Property mpcore_rirq_properties[] = {
+static const Property mpcore_rirq_properties[] = {
     DEFINE_PROP_UINT32("num-cpu", mpcore_rirq_state, num_cpu, 1),
     DEFINE_PROP_END_OF_LIST(),
 };