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Mon, 16 Dec 2024 22:25:04 -0800 (PST) Received: from fchang-1826.internal.sifive.com ([210.176.154.33]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72925e6e8b1sm4354301b3a.139.2024.12.16.22.25.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Dec 2024 22:25:03 -0800 (PST) From: frank.chang@sifive.com To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Cc: Palmer Dabbelt , Alistair Francis , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , Tommy Wu , Frank Chang Subject: [PATCH v10 1/7] target/riscv: Add 'ext_smrnmi' in the RISCVCPUConfig Date: Tue, 17 Dec 2024 14:24:34 +0800 Message-Id: <20241217062440.884261-2-frank.chang@sifive.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241217062440.884261-1-frank.chang@sifive.com> References: <20241217062440.884261-1-frank.chang@sifive.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=frank.chang@sifive.com; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Tommy Wu The boolean variable 'ext_smrnmi' is used to determine whether the Smrnmi extension exists. Signed-off-by: Frank Chang Signed-off-by: Tommy Wu Reviewed-by: Alistair Francis --- target/riscv/cpu_cfg.h | 1 + 1 file changed, 1 insertion(+) diff --git a/target/riscv/cpu_cfg.h b/target/riscv/cpu_cfg.h index fe0c4173d2..28b43932db 100644 --- a/target/riscv/cpu_cfg.h +++ b/target/riscv/cpu_cfg.h @@ -129,6 +129,7 @@ struct RISCVCPUConfig { bool ext_ssaia; bool ext_sscofpmf; bool ext_smepmp; + bool ext_smrnmi; bool rvv_ta_all_1s; bool rvv_ma_all_1s; bool rvv_vl_half_avl;