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[14.200.18.130]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-219dc970520sm2881595ad.75.2024.12.18.19.40.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2024 19:40:51 -0800 (PST) From: Nicholas Piggin To: qemu-ppc@nongnu.org Cc: Nicholas Piggin , Daniel Henrique Barboza , Harsh Prateek Bora , qemu-devel@nongnu.org Subject: [PATCH 3/5] spapr: Generate random HASHPKEYR for spapr machines Date: Thu, 19 Dec 2024 13:40:33 +1000 Message-ID: <20241219034035.1826173-4-npiggin@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241219034035.1826173-1-npiggin@gmail.com> References: <20241219034035.1826173-1-npiggin@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=npiggin@gmail.com; helo=mail-pl1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The hypervisor is expected to create a value for the HASHPKEY SPR for each partition. Currently it uses zero for all partitions, use a random number instead, which in theory might make kernel ROP protection more secure. Signed-of-by: Nicholas Piggin Reviewed-by: Harsh Prateek Bora Reviewed-by: Philippe Mathieu-Daudé --- include/hw/ppc/spapr.h | 1 + hw/ppc/spapr.c | 3 +++ hw/ppc/spapr_cpu_core.c | 2 ++ 3 files changed, 6 insertions(+) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index af4aa1cb0fb..db44893689b 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -201,6 +201,7 @@ struct SpaprMachineState { uint32_t fdt_initial_size; void *fdt_blob; uint8_t fdt_rng_seed[32]; + uint64_t hashpkey_val; long kernel_size; bool kernel_le; uint64_t kernel_addr; diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index fa05e0c5156..34934afd551 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2888,6 +2888,9 @@ static void spapr_machine_init(MachineState *machine) spapr_ovec_set(spapr->ov5, OV5_XIVE_EXPLOIT); } + qemu_guest_getrandom_nofail(&spapr->hashpkey_val, + sizeof(spapr->hashpkey_val)); + /* init CPUs */ spapr_init_cpus(spapr); diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 88d743a3c3f..bf9f29f4ff3 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -273,6 +273,8 @@ static bool spapr_realize_vcpu(PowerPCCPU *cpu, SpaprMachineState *spapr, env->spr_cb[SPR_PIR].default_value = cs->cpu_index; env->spr_cb[SPR_TIR].default_value = thread_index; + env->spr_cb[SPR_HASHPKEYR].default_value = spapr->hashpkey_val; + cpu_ppc_set_1lpar(cpu); /* Set time-base frequency to 512 MHz. vhyp must be set first. */