From patchwork Thu Dec 19 07:54:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bibo Mao X-Patchwork-Id: 13914702 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2CEFAE7718D for ; Thu, 19 Dec 2024 07:56:52 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOBNS-0003jW-CA; Thu, 19 Dec 2024 02:55:22 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tOBNP-0003h5-HG for qemu-devel@nongnu.org; Thu, 19 Dec 2024 02:55:19 -0500 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tOBNL-0004pI-Jp for qemu-devel@nongnu.org; Thu, 19 Dec 2024 02:55:19 -0500 Received: from loongson.cn (unknown [10.2.5.213]) by gateway (Coremail) with SMTP id _____8AxUa9c0WNnh3hYAA--.42798S3; Thu, 19 Dec 2024 15:55:08 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.213]) by front1 (Coremail) with SMTP id qMiowMAxQMZX0WNnSCkCAA--.12762S5; Thu, 19 Dec 2024 15:55:08 +0800 (CST) From: Bibo Mao To: Stefan Hajnoczi Cc: qemu-devel@nongnu.org, Song Gao Subject: [PULL 03/18] hw/intc/loongarch_pch: Merge instance_init() into realize() Date: Thu, 19 Dec 2024 15:54:47 +0800 Message-Id: <20241219075502.3164644-4-maobibo@loongson.cn> X-Mailer: git-send-email 2.39.3 In-Reply-To: <20241219075502.3164644-1-maobibo@loongson.cn> References: <20241219075502.3164644-1-maobibo@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMAxQMZX0WNnSCkCAA--.12762S5 X-CM-SenderInfo: xpdruxter6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass client-ip=114.242.206.163; envelope-from=maobibo@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Memory region is created in instance_init(), merge it into function realize(). There is no special class_init() for loongarch_pch object. Signed-off-by: Bibo Mao Reviewed-by: Song Gao --- hw/intc/loongarch_pch_pic.c | 15 ++++----------- 1 file changed, 4 insertions(+), 11 deletions(-) diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c index 6a87b1aab7..ea87851994 100644 --- a/hw/intc/loongarch_pch_pic.c +++ b/hw/intc/loongarch_pch_pic.c @@ -382,6 +382,7 @@ static void loongarch_pch_pic_reset(DeviceState *d) static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) { LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) { error_setg(errp, "Invalid 'pic_irq_num'"); @@ -390,19 +391,12 @@ static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp) qdev_init_gpio_out(dev, s->parent_irq, s->irq_num); qdev_init_gpio_in(dev, pch_pic_irq_handler, s->irq_num); -} - -static void loongarch_pch_pic_init(Object *obj) -{ - LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(obj); - SysBusDevice *sbd = SYS_BUS_DEVICE(obj); - - memory_region_init_io(&s->iomem32_low, obj, + memory_region_init_io(&s->iomem32_low, OBJECT(dev), &loongarch_pch_pic_reg32_low_ops, s, PCH_PIC_NAME(.reg32_part1), 0x100); - memory_region_init_io(&s->iomem8, obj, &loongarch_pch_pic_reg8_ops, + memory_region_init_io(&s->iomem8, OBJECT(dev), &loongarch_pch_pic_reg8_ops, s, PCH_PIC_NAME(.reg8), 0x2a0); - memory_region_init_io(&s->iomem32_high, obj, + memory_region_init_io(&s->iomem32_high, OBJECT(dev), &loongarch_pch_pic_reg32_high_ops, s, PCH_PIC_NAME(.reg32_part2), 0xc60); sysbus_init_mmio(sbd, &s->iomem32_low); @@ -451,7 +445,6 @@ static const TypeInfo loongarch_pch_pic_info = { .name = TYPE_LOONGARCH_PCH_PIC, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(LoongArchPCHPIC), - .instance_init = loongarch_pch_pic_init, .class_init = loongarch_pch_pic_class_init, };