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Fri, 20 Dec 2024 08:19:49 -0800 (PST) Received: from localhost.localdomain ([78.196.4.158]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43656b0145csm83868365e9.15.2024.12.20.08.19.49 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 20 Dec 2024 08:19:49 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Peter Maydell , Richard Henderson Subject: [PULL 52/59] target/xtensa: Remove tswap() calls in semihosting simcall() helper Date: Fri, 20 Dec 2024 17:15:43 +0100 Message-ID: <20241220161551.89317-53-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241220161551.89317-1-philmd@linaro.org> References: <20241220161551.89317-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=philmd@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org In preparation of heterogeneous emulation where cores with different endianness can run concurrently, replace the pair of cpu_memory_rw_debug() + tswap() calls by put/get_user_u32() ones, which still do the same under the hood, but simplify the code maintenance (having less sites to do endianness code conversion). Suggested-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <6e1e69d8-a9f3-4a30-83c8-84c5647578d5@linaro.org> --- target/xtensa/xtensa-semi.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/target/xtensa/xtensa-semi.c b/target/xtensa/xtensa-semi.c index fa21b7e11fc..2ded8e5634e 100644 --- a/target/xtensa/xtensa-semi.c +++ b/target/xtensa/xtensa-semi.c @@ -30,6 +30,7 @@ #include "chardev/char-fe.h" #include "exec/helper-proto.h" #include "semihosting/semihost.h" +#include "semihosting/uaccess.h" #include "qapi/error.h" #include "qemu/log.h" @@ -323,15 +324,12 @@ void HELPER(simcall)(CPUXtensaState *env) uint32_t fd = regs[3]; uint32_t rq = regs[4]; uint32_t target_tv = regs[5]; - uint32_t target_tvv[2]; struct timeval tv = {0}; if (target_tv) { - cpu_memory_rw_debug(cs, target_tv, - (uint8_t *)target_tvv, sizeof(target_tvv), 0); - tv.tv_sec = (int32_t)tswap32(target_tvv[0]); - tv.tv_usec = (int32_t)tswap32(target_tvv[1]); + get_user_u32(tv.tv_sec, target_tv); + get_user_u32(tv.tv_sec, target_tv + 4); } if (fd < 3 && sim_console) { if ((fd == 1 || fd == 2) && rq == SELECT_ONE_WRITE) { @@ -387,11 +385,8 @@ void HELPER(simcall)(CPUXtensaState *env) const char *str = semihosting_get_arg(i); int str_size = strlen(str) + 1; - argptr = tswap32(regs[3] + str_offset); - - cpu_memory_rw_debug(cs, - regs[3] + i * sizeof(uint32_t), - (uint8_t *)&argptr, sizeof(argptr), 1); + put_user_u32(regs[3] + str_offset, + regs[3] + i * sizeof(uint32_t)); cpu_memory_rw_debug(cs, regs[3] + str_offset, (uint8_t *)str, str_size, 1);