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Thu, 26 Dec 2024 16:20:18 -0500 (EST) From: Jiaxun Yang Date: Thu, 26 Dec 2024 21:19:49 +0000 Subject: [PATCH v2 18/23] target/loongarch: ifdef out 64 bit CPUs on 32 bit builds MIME-Version: 1.0 Message-Id: <20241226-la32-fixes1-v2-18-0414594f8cb5@flygoat.com> References: <20241226-la32-fixes1-v2-0-0414594f8cb5@flygoat.com> In-Reply-To: <20241226-la32-fixes1-v2-0-0414594f8cb5@flygoat.com> To: qemu-devel@nongnu.org Cc: Song Gao , Bibo Mao , Eric Blake , Markus Armbruster , Eduardo Habkost , Marcel Apfelbaum , =?utf-8?q?Philippe_Mathieu-?= =?utf-8?q?Daud=C3=A9?= , Yanan Wang , Zhao Liu , Paolo Bonzini , Jiaxun Yang X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4395; i=jiaxun.yang@flygoat.com; h=from:subject:message-id; bh=r6c46xv1jpn2ABIYObG2TFnqZDRs36DnvEiW/1NNqFk=; b=kA0DAAoWQ3EMfdd3KcMByyZiAGdtyGui2w9Zo8WjPniWum+OYSzouy1DaLd69A/+fKAbLdFfH oh1BAAWCgAdFiEEVBAijrCB0aDX4Gr8Q3EMfdd3KcMFAmdtyGsACgkQQ3EMfdd3KcORzgD/Z4SP kvqFGu8V2EJvbx0uhO5o86psuGUezcy0GihF6qQA/Ag5JabV85dYbJItmmFXuCT5upFmSjNztia DpN+gjccH X-Developer-Key: i=jiaxun.yang@flygoat.com; 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Signed-off-by: Jiaxun Yang --- target/loongarch/cpu.c | 68 ++++++++++++++++++++++++++++---------------------- 1 file changed, 38 insertions(+), 30 deletions(-) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 82412f8867a50a6cd25cff511def0f24d2b10b49..720f5b97698abe454c79c2f8fb2a36d0113c5c24 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -375,6 +375,36 @@ static int loongarch_cpu_mmu_index(CPUState *cs, bool ifetch) return MMU_DA_IDX; } +static void loongarch_la132_initfn(Object *obj) +{ + LoongArchCPU *cpu = LOONGARCH_CPU(obj); + CPULoongArchState *env = &cpu->env; + + int i; + + for (i = 0; i < 21; i++) { + env->cpucfg[i] = 0x0; + } + + cpu->dtb_compatible = "loongarch,Loongson-1C103"; + env->cpucfg[0] = 0x148042; /* PRID */ + + uint32_t data = 0; + data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */ + data = FIELD_DP32(data, CPUCFG1, PGMMU, 1); + data = FIELD_DP32(data, CPUCFG1, IOCSR, 1); + data = FIELD_DP32(data, CPUCFG1, PALEN, 0x1f); /* 32 bits */ + data = FIELD_DP32(data, CPUCFG1, VALEN, 0x1f); /* 32 bits */ + data = FIELD_DP32(data, CPUCFG1, UAL, 1); + data = FIELD_DP32(data, CPUCFG1, RI, 0); + data = FIELD_DP32(data, CPUCFG1, EP, 0); + data = FIELD_DP32(data, CPUCFG1, RPLV, 0); + data = FIELD_DP32(data, CPUCFG1, HP, 1); + data = FIELD_DP32(data, CPUCFG1, IOCSR_BRD, 1); + env->cpucfg[1] = data; +} + +#ifdef TARGET_LOONGARCH64 static void loongarch_la464_initfn(Object *obj) { LoongArchCPU *cpu = LOONGARCH_CPU(obj); @@ -473,40 +503,12 @@ static void loongarch_la464_initfn(Object *obj) loongarch_cpu_post_init(obj); } -static void loongarch_la132_initfn(Object *obj) -{ - LoongArchCPU *cpu = LOONGARCH_CPU(obj); - CPULoongArchState *env = &cpu->env; - - int i; - - for (i = 0; i < 21; i++) { - env->cpucfg[i] = 0x0; - } - - cpu->dtb_compatible = "loongarch,Loongson-1C103"; - env->cpucfg[0] = 0x148042; /* PRID */ - - uint32_t data = 0; - data = FIELD_DP32(data, CPUCFG1, ARCH, 1); /* LA32 */ - data = FIELD_DP32(data, CPUCFG1, PGMMU, 1); - data = FIELD_DP32(data, CPUCFG1, IOCSR, 1); - data = FIELD_DP32(data, CPUCFG1, PALEN, 0x1f); /* 32 bits */ - data = FIELD_DP32(data, CPUCFG1, VALEN, 0x1f); /* 32 bits */ - data = FIELD_DP32(data, CPUCFG1, UAL, 1); - data = FIELD_DP32(data, CPUCFG1, RI, 0); - data = FIELD_DP32(data, CPUCFG1, EP, 0); - data = FIELD_DP32(data, CPUCFG1, RPLV, 0); - data = FIELD_DP32(data, CPUCFG1, HP, 1); - data = FIELD_DP32(data, CPUCFG1, IOCSR_BRD, 1); - env->cpucfg[1] = data; -} - static void loongarch_max_initfn(Object *obj) { /* '-cpu max' for TCG: we use cpu la464. */ loongarch_la464_initfn(obj); } +#endif static void loongarch_cpu_reset_hold(Object *obj, ResetType type) { @@ -870,6 +872,7 @@ static void loongarch32_cpu_class_init(ObjectClass *c, void *data) cc->gdb_arch_name = loongarch32_gdb_arch_name; } +#ifdef TARGET_LOONGARCH64 static const gchar *loongarch64_gdb_arch_name(CPUState *cs) { return "loongarch64"; @@ -882,6 +885,7 @@ static void loongarch64_cpu_class_init(ObjectClass *c, void *data) cc->gdb_core_xml_file = "loongarch-base64.xml"; cc->gdb_arch_name = loongarch64_gdb_arch_name; } +#endif #define DEFINE_LOONGARCH_CPU_TYPE(size, model, initfn) \ { \ @@ -909,6 +913,7 @@ static const TypeInfo loongarch_cpu_type_infos[] = { .abstract = true, .class_init = loongarch32_cpu_class_init, }, +#ifdef TARGET_LOONGARCH64 { .name = TYPE_LOONGARCH64_CPU, .parent = TYPE_LOONGARCH_CPU, @@ -916,9 +921,12 @@ static const TypeInfo loongarch_cpu_type_infos[] = { .abstract = true, .class_init = loongarch64_cpu_class_init, }, - DEFINE_LOONGARCH_CPU_TYPE(64, "la464", loongarch_la464_initfn), +#endif DEFINE_LOONGARCH_CPU_TYPE(32, "la132", loongarch_la132_initfn), +#ifdef TARGET_LOONGARCH64 + DEFINE_LOONGARCH_CPU_TYPE(64, "la464", loongarch_la464_initfn), DEFINE_LOONGARCH_CPU_TYPE(64, "max", loongarch_max_initfn), +#endif }; DEFINE_TYPES(loongarch_cpu_type_infos)