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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43661219578sm362694145e9.20.2024.12.30.07.25.39 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 30 Dec 2024 07:25:39 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , Helge Deller , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 4/5] target/hppa: Set PC on vCPU reset Date: Mon, 30 Dec 2024 16:25:18 +0100 Message-ID: <20241230152519.86291-5-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20241230152519.86291-1-philmd@linaro.org> References: <20241230152519.86291-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Helge Deller On reset: "The CPU begins fetching instructions from address 0xf0000004. This address is in PDC space." Switch vCPUs to 32-bit mode (PSW_W bit is not set) and start execution at address 0xf0000004. Signed-off-by: Helge Deller Co-developed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé --- target/hppa/cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index dbd46842841..7278b7ca6b5 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -205,6 +205,7 @@ static void hppa_cpu_reset_hold(Object *obj, ResetType type) } cs->exception_index = -1; cs->halted = 0; + cpu_set_pc(cs, 0xf0000004); memset(env, 0, offsetof(CPUHPPAState, end_reset_fields));