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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-436e9dc8802sm125761915e9.10.2025.01.12.16.49.32 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 12 Jan 2025 16:49:32 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Paul Burton , Aurelien Jarno , Jiaxun Yang Subject: [PATCH 18/23] hw/mips/boston: Propagate CPU to gen_firmware() Date: Mon, 13 Jan 2025 01:47:43 +0100 Message-ID: <20250113004748.41658-19-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250113004748.41658-1-philmd@linaro.org> References: <20250113004748.41658-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org In boston_mach_init(), resolves the first CPU from the CPS container using the QOM "cpu[0]" path. Propagate it to gen_firmware(), removing the &first_cpu use. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/boston.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/hw/mips/boston.c b/hw/mips/boston.c index 09c4dfade12..f2c0e335e73 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -323,25 +323,26 @@ static void boston_register_types(void) } type_init(boston_register_types) -static void gen_firmware(void *p, hwaddr kernel_entry, hwaddr fdt_addr) +static void gen_firmware(const MIPSCPU *cpu, void *p, + hwaddr kernel_entry, hwaddr fdt_addr) { uint64_t regaddr; /* Move CM GCRs */ regaddr = cpu_mips_phys_to_kseg1(NULL, GCR_BASE_ADDR + GCR_BASE_OFS), - bl_gen_write_u64(MIPS_CPU(first_cpu), &p, regaddr, + bl_gen_write_u64(cpu, &p, regaddr, boston_memmap[BOSTON_CM].base); /* Move & enable GIC GCRs */ regaddr = cpu_mips_phys_to_kseg1(NULL, boston_memmap[BOSTON_CM].base + GCR_GIC_BASE_OFS), - bl_gen_write_u64(MIPS_CPU(first_cpu), &p, regaddr, + bl_gen_write_u64(cpu, &p, regaddr, boston_memmap[BOSTON_GIC].base | GCR_GIC_BASE_GICEN_MSK); /* Move & enable CPC GCRs */ regaddr = cpu_mips_phys_to_kseg1(NULL, boston_memmap[BOSTON_CM].base + GCR_CPC_BASE_OFS), - bl_gen_write_u64(MIPS_CPU(first_cpu), &p, regaddr, + bl_gen_write_u64(cpu, &p, regaddr, boston_memmap[BOSTON_CPC].base | GCR_CPC_BASE_CPCEN_MSK); /* @@ -352,7 +353,7 @@ static void gen_firmware(void *p, hwaddr kernel_entry, hwaddr fdt_addr) * a2/$6 = 0 * a3/$7 = 0 */ - bl_gen_jump_kernel(MIPS_CPU(first_cpu), &p, + bl_gen_jump_kernel(cpu, &p, true, 0, true, (int32_t)-2, true, fdt_addr, true, 0, true, 0, kernel_entry); @@ -825,7 +826,9 @@ static void boston_mach_init(MachineState *machine) } } - gen_firmware(memory_region_get_ram_ptr(flash) + 0x7c00000, + gen_firmware(MIPS_CPU(object_resolve_path_component(OBJECT(&s->cps), + "cpu[0]")), + memory_region_get_ram_ptr(flash) + 0x7c00000, s->kernel_entry, s->fdt_base); } else if (!qtest_enabled()) { error_report("Please provide either a -kernel or -bios argument");