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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38a8e37d012sm18781309f8f.8.2025.01.15.15.24.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 15 Jan 2025 15:24:38 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jason Wang , Hanna Reitz , Dmitry Fleytman , qemu-block@nongnu.org, Fam Zheng , Paolo Bonzini , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Zhao Liu , Yanan Wang , Kevin Wolf , Eduardo Habkost , Richard Henderson , Marcel Apfelbaum , Gerd Hoffmann , John Snow Subject: [PATCH 20/21] hw/net/vmxnet3: Remove VMXNET3_COMPAT_FLAG_DISABLE_PCIE definition Date: Thu, 16 Jan 2025 00:22:46 +0100 Message-ID: <20250115232247.30364-21-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250115232247.30364-1-philmd@linaro.org> References: <20250115232247.30364-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=philmd@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org VMXNET3_COMPAT_FLAG_DISABLE_PCIE was only used by the hw_compat_2_5[] array, via the 'x-disable-pcie=on' property. We removed all machines using that array, lets remove all the code around VMXNET3_COMPAT_FLAG_DISABLE_PCIE. Signed-off-by: Philippe Mathieu-Daudé --- hw/net/vmxnet3.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c index a527042ab32..d8132773fad 100644 --- a/hw/net/vmxnet3.c +++ b/hw/net/vmxnet3.c @@ -41,11 +41,6 @@ #define PCI_DEVICE_ID_VMWARE_VMXNET3_REVISION 0x1 #define VMXNET3_MSIX_BAR_SIZE 0x2000 -/* Compatibility flags for migration */ -#define VMXNET3_COMPAT_FLAG_DISABLE_PCIE_BIT 1 -#define VMXNET3_COMPAT_FLAG_DISABLE_PCIE \ - (1 << VMXNET3_COMPAT_FLAG_DISABLE_PCIE_BIT) - #define VMXNET3_EXP_EP_OFFSET (0x48) #define VMXNET3_MSI_OFFSET (0x84) #define VMXNET3_MSIX_OFFSET (0x9c) @@ -2467,8 +2462,6 @@ static const VMStateDescription vmstate_vmxnet3 = { static const Property vmxnet3_properties[] = { DEFINE_NIC_PROPERTIES(VMXNET3State, conf), - DEFINE_PROP_BIT("x-disable-pcie", VMXNET3State, compat_flags, - VMXNET3_COMPAT_FLAG_DISABLE_PCIE_BIT, false), }; static void vmxnet3_realize(DeviceState *qdev, Error **errp) @@ -2477,9 +2470,7 @@ static void vmxnet3_realize(DeviceState *qdev, Error **errp) PCIDevice *pci_dev = PCI_DEVICE(qdev); VMXNET3State *s = VMXNET3(qdev); - if (!(s->compat_flags & VMXNET3_COMPAT_FLAG_DISABLE_PCIE)) { - pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; - } + pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS; vc->parent_dc_realize(qdev, errp); }