diff mbox series

[PULL,31/68] tcg: Include 'tcg-target-has.h' once in 'tcg-has.h'

Message ID 20250117182456.2077110-32-richard.henderson@linaro.org (mailing list archive)
State New
Headers show
Series [PULL,01/68] disas/riscv: Guard dec->cfg dereference for host disassemble | expand

Commit Message

Richard Henderson Jan. 17, 2025, 6:24 p.m. UTC 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250108215156.8731-14-philmd@linaro.org>
---
 tcg/aarch64/tcg-target.h     | 2 --
 tcg/arm/tcg-target.h         | 2 --
 tcg/i386/tcg-target.h        | 2 --
 tcg/loongarch64/tcg-target.h | 2 --
 tcg/mips/tcg-target.h        | 2 --
 tcg/ppc/tcg-target.h         | 2 --
 tcg/riscv/tcg-target.h       | 2 --
 tcg/s390x/tcg-target.h       | 2 --
 tcg/sparc64/tcg-target.h     | 2 --
 tcg/tcg-has.h                | 2 ++
 tcg/tci/tcg-target.h         | 2 --
 11 files changed, 2 insertions(+), 20 deletions(-)
diff mbox series

Patch

diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index 9a682e51a4..1ef8b2e300 100644
--- a/tcg/aarch64/tcg-target.h
+++ b/tcg/aarch64/tcg-target.h
@@ -47,8 +47,6 @@  typedef enum {
 
 #define TCG_TARGET_NB_REGS 64
 
-#include "tcg-target-has.h"
-
 #define TCG_TARGET_DEFAULT_MO (0)
 
 #endif /* AARCH64_TCG_TARGET_H */
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index e114f7ddf4..21563e00f9 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -70,8 +70,6 @@  typedef enum {
 
 #define TCG_TARGET_NB_REGS 32
 
-#include "tcg-target-has.h"
-
 #define TCG_TARGET_DEFAULT_MO (0)
 
 #endif
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index a1dfdeb28d..e6d7fd526e 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -88,8 +88,6 @@  typedef enum {
     TCG_REG_CALL_STACK = TCG_REG_ESP
 } TCGReg;
 
-#include "tcg-target-has.h"
-
 /* This defines the natural memory order supported by this
  * architecture before guarantees made by various barrier
  * instructions.
diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h
index a3a6130720..0432a4ebbd 100644
--- a/tcg/loongarch64/tcg-target.h
+++ b/tcg/loongarch64/tcg-target.h
@@ -85,8 +85,6 @@  typedef enum {
     TCG_VEC_TMP0 = TCG_REG_V23,
 } TCGReg;
 
-#include "tcg-target-has.h"
-
 #define TCG_TARGET_DEFAULT_MO (0)
 
 #endif /* LOONGARCH_TCG_TARGET_H */
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index a34765b389..210044ca12 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-target.h
@@ -70,8 +70,6 @@  typedef enum {
     TCG_AREG0 = TCG_REG_S8,
 } TCGReg;
 
-#include "tcg-target-has.h"
-
 #define TCG_TARGET_DEFAULT_MO           0
 
 #endif
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
index fa2cc28183..0bc13d7363 100644
--- a/tcg/ppc/tcg-target.h
+++ b/tcg/ppc/tcg-target.h
@@ -53,8 +53,6 @@  typedef enum {
     TCG_AREG0 = TCG_REG_R27
 } TCGReg;
 
-#include "tcg-target-has.h"
-
 #define TCG_TARGET_DEFAULT_MO (0)
 
 #endif
diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h
index c710321bdb..4c40662402 100644
--- a/tcg/riscv/tcg-target.h
+++ b/tcg/riscv/tcg-target.h
@@ -57,8 +57,6 @@  typedef enum {
     TCG_REG_TMP2       = TCG_REG_T4,
 } TCGReg;
 
-#include "tcg-target-has.h"
-
 #define TCG_TARGET_DEFAULT_MO (0)
 
 #endif
diff --git a/tcg/s390x/tcg-target.h b/tcg/s390x/tcg-target.h
index 220ed68b1f..f790b77075 100644
--- a/tcg/s390x/tcg-target.h
+++ b/tcg/s390x/tcg-target.h
@@ -51,8 +51,6 @@  typedef enum TCGReg {
 
 #define TCG_TARGET_NB_REGS 64
 
-#include "tcg-target-has.h"
-
 #define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
 
 #endif
diff --git a/tcg/sparc64/tcg-target.h b/tcg/sparc64/tcg-target.h
index 1462144631..5ecca5586b 100644
--- a/tcg/sparc64/tcg-target.h
+++ b/tcg/sparc64/tcg-target.h
@@ -66,8 +66,6 @@  typedef enum {
 
 #define TCG_AREG0 TCG_REG_I0
 
-#include "tcg-target-has.h"
-
 #define TCG_TARGET_DEFAULT_MO (0)
 
 #endif
diff --git a/tcg/tcg-has.h b/tcg/tcg-has.h
index c09ce13389..65b6a0b0cf 100644
--- a/tcg/tcg-has.h
+++ b/tcg/tcg-has.h
@@ -7,6 +7,8 @@ 
 #ifndef TCG_HAS_H
 #define TCG_HAS_H
 
+#include "tcg-target-has.h"
+
 #if TCG_TARGET_REG_BITS == 32
 /* Turn some undef macros into false macros.  */
 #define TCG_TARGET_HAS_extr_i64_i32     0
diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h
index 899d9861a6..fea92f7848 100644
--- a/tcg/tci/tcg-target.h
+++ b/tcg/tci/tcg-target.h
@@ -44,8 +44,6 @@ 
 #define TCG_TARGET_INSN_UNIT_SIZE 4
 #define MAX_CODE_GEN_BUFFER_SIZE  ((size_t)-1)
 
-#include "tcg-target-has.h"
-
 /* Number of registers available. */
 #define TCG_TARGET_NB_REGS 16