[v1,18/18] hw/misc/aspeed_hace: (DROP) Fix boot issue in the Crypto Manager Self Test(WORKAROUND)

Commit Message

Jamin Lin Jan. 21, 2025, 7:04 a.m. UTC

Currently, it does not support the CRYPT command.
Instead, it only sends an interrupt to notify the firmware
that the crypt command has completed.
It is a temporary workaround to resolve the boot issue in
the Crypto Manager Self Test.
Full support for the CRYPT command will be implemented in the future.

It only for reviewer testing and please drop this patch.

Signed-off-by: Jamin Lin <[e-mail]>
---
 hw/misc/aspeed_hace.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

Patch

diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
index 86422cb3be..c3ec6179b9 100644
--- a/hw/misc/aspeed_hace.c
+++ b/hw/misc/aspeed_hace.c
@@ -58,6 +58,7 @@ 
 #define  HASH_HASH_THEN_CRYPT           (BIT(0) | BIT(1))
 /* Other cmd bits */
 #define  HASH_IRQ_EN                    BIT(9)
+#define  CRYPT_IRQ_EN                  BIT(12)
 #define  HASH_SG_EN                     BIT(18)
 /* Scatter-gather data list */
 #define SG_LIST_LEN_SIZE                4
@@ -343,6 +344,13 @@  static void aspeed_hace_write(void *opaque, hwaddr addr, uint64_t data,
                 qemu_irq_lower(s->irq);
             }
         }
+        if (data & CRYPT_IRQ) {
+            data &= ~CRYPT_IRQ;
+
+            if (s->regs[addr] & CRYPT_IRQ) {
+                qemu_irq_lower(s->irq);
+            }
+        }
         break;
     case R_HASH_SRC:
         data &= ahc->src_mask;
@@ -388,6 +396,10 @@  static void aspeed_hace_write(void *opaque, hwaddr addr, uint64_t data,
     case R_CRYPT_CMD:
         qemu_log_mask(LOG_UNIMP, "%s: Crypt commands not implemented\n",
                        __func__);
+        s->regs[R_STATUS] |= CRYPT_IRQ;
+        if (data & CRYPT_IRQ_EN) {
+            qemu_irq_raise(s->irq);
+        }
         break;
     default:
         break;