diff mbox series

[v1,03/18] hw/intc/aspeed: Introduce a new aspeed_2700_intc0_ops for INTC0

Message ID 20250121070424.2465942-4-jamin_lin@aspeedtech.com (mailing list archive)
State New
Headers show
Series Support AST2700 A1 | expand

Commit Message

Jamin Lin Jan. 21, 2025, 7:04 a.m. UTC 
Rename "aspeed_intc_read" to "aspeed_2700_intc0_read" and "aspeed_intc_write" to
"aspeed_2700_intc0_write".

Introduce a new memory region operation, "aspeed_2700_intc0_ops", for the
AST2700 INTC0 model.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
 hw/intc/aspeed_intc.c | 20 +++++++++++++++-----
 1 file changed, 15 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/hw/intc/aspeed_intc.c b/hw/intc/aspeed_intc.c
index 628f69ea88..219ca02940 100644
--- a/hw/intc/aspeed_intc.c
+++ b/hw/intc/aspeed_intc.c
@@ -114,7 +114,8 @@  static void aspeed_intc_set_irq(void *opaque, int irq, int level)
     }
 }
 
-static uint64_t aspeed_intc_read(void *opaque, hwaddr offset, unsigned int size)
+static uint64_t aspeed_2700_intc0_read(void *opaque, hwaddr offset,
+                                       unsigned int size)
 {
     AspeedINTCState *s = ASPEED_INTC(opaque);
     uint32_t addr = offset >> 2;
@@ -133,8 +134,8 @@  static uint64_t aspeed_intc_read(void *opaque, hwaddr offset, unsigned int size)
     return value;
 }
 
-static void aspeed_intc_write(void *opaque, hwaddr offset, uint64_t data,
-                                        unsigned size)
+static void aspeed_2700_intc0_write(void *opaque, hwaddr offset, uint64_t data,
+                                    unsigned size)
 {
     AspeedINTCState *s = ASPEED_INTC(opaque);
     AspeedINTCClass *aic = ASPEED_INTC_GET_CLASS(s);
@@ -261,8 +262,6 @@  static void aspeed_intc_write(void *opaque, hwaddr offset, uint64_t data,
 }
 
 static const MemoryRegionOps aspeed_intc_ops = {
-    .read = aspeed_intc_read,
-    .write = aspeed_intc_write,
     .endianness = DEVICE_LITTLE_ENDIAN,
     .valid = {
         .min_access_size = 4,
@@ -339,6 +338,16 @@  static const TypeInfo aspeed_intc_info = {
     .abstract = true,
 };
 
+static const MemoryRegionOps aspeed_2700_intc0_ops = {
+    .read = aspeed_2700_intc0_read,
+    .write = aspeed_2700_intc0_write,
+    .endianness = DEVICE_LITTLE_ENDIAN,
+    .valid = {
+        .min_access_size = 4,
+        .max_access_size = 4,
+    }
+};
+
 static void aspeed_2700_intc0_class_init(ObjectClass *klass, void *data)
 {
     DeviceClass *dc = DEVICE_CLASS(klass);
@@ -347,6 +356,7 @@  static void aspeed_2700_intc0_class_init(ObjectClass *klass, void *data)
     dc->desc = "ASPEED 2700 INTC 0 Controller";
     aic->num_lines = 32;
     aic->num_ints = 9;
+    aic->reg_ops = &aspeed_2700_intc0_ops;
 }
 
 static const TypeInfo aspeed_2700_intc0_info = {