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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-438bd48a906sm35858865e9.18.2025.01.24.09.50.58 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Fri, 24 Jan 2025 09:50:59 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , Bernhard Beschow , Magnus Damm , Yoshinori Sato , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= Subject: [PATCH 1/2] hw/char/sh_serial: Delete fifo_timeout_timer in DeviceUnrealize Date: Fri, 24 Jan 2025 18:50:52 +0100 Message-ID: <20250124175053.74461-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250124175053.74461-1-philmd@linaro.org> References: <20250124175053.74461-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org fifo_timeout_timer is created in the DeviceRealize handler, not in the instance_init one. For parity, delete it in DeviceUnrealize, rather than instance_finalize. Signed-off-by: Philippe Mathieu-Daudé --- hw/char/sh_serial.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/hw/char/sh_serial.c b/hw/char/sh_serial.c index 247aeb071ac..29ac9f9e5e7 100644 --- a/hw/char/sh_serial.c +++ b/hw/char/sh_serial.c @@ -436,9 +436,9 @@ static void sh_serial_realize(DeviceState *d, Error **errp) s->etu = NANOSECONDS_PER_SECOND / 9600; } -static void sh_serial_finalize(Object *obj) +static void sh_serial_unrealize(DeviceState *dev) { - SHSerialState *s = SH_SERIAL(obj); + SHSerialState *s = SH_SERIAL(dev); timer_del(&s->fifo_timeout_timer); } @@ -447,6 +447,10 @@ static void sh_serial_init(Object *obj) { } +static void sh_serial_finalize(Object *obj) +{ +} + static const Property sh_serial_properties[] = { DEFINE_PROP_CHR("chardev", SHSerialState, chr), DEFINE_PROP_UINT8("features", SHSerialState, feat, 0), @@ -458,6 +462,7 @@ static void sh_serial_class_init(ObjectClass *oc, void *data) device_class_set_props(dc, sh_serial_properties); dc->realize = sh_serial_realize; + dc->unrealize = sh_serial_unrealize; device_class_set_legacy_reset(dc, sh_serial_reset); /* Reason: part of SuperH CPU/SoC, needs to be wired up */ dc->user_creatable = false;