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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38c2a1c418esm13920133f8f.95.2025.01.28.02.45.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Jan 2025 02:45:26 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: qemu-block@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Bin Meng , Bernhard Beschow Subject: [PATCH 05/11] hw/sd/omap_mmc: Use similar API for "wire up omap_clk" to other OMAP devices Date: Tue, 28 Jan 2025 10:45:13 +0000 Message-Id: <20250128104519.3981448-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250128104519.3981448-1-peter.maydell@linaro.org> References: <20250128104519.3981448-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The approach we've settled on for handling the omap_clk wiring for OMAP devices converted to QDev is to have a function omap_foo_set_clk() whose implementation just sets the field directly in the device's state struct. (See the "TODO" comment near the top of omap.h.) Make omap_mmc do the same. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé --- include/hw/arm/omap.h | 3 +++ hw/sd/omap_mmc.c | 9 ++++++++- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/include/hw/arm/omap.h b/include/hw/arm/omap.h index d20c55a8957..7cb87ea89cd 100644 --- a/include/hw/arm/omap.h +++ b/include/hw/arm/omap.h @@ -535,6 +535,9 @@ OBJECT_DECLARE_SIMPLE_TYPE(OMAPMMCState, OMAP_MMC) DeviceState *omap_mmc_init(hwaddr base, MemoryRegion *sysmem, qemu_irq irq, qemu_irq dma[], omap_clk clk); +/* TODO: clock framework (see above) */ +void omap_mmc_set_clk(DeviceState *dev, omap_clk clk); + /* omap_i2c.c */ I2CBus *omap_i2c_bus(DeviceState *omap_i2c); diff --git a/hw/sd/omap_mmc.c b/hw/sd/omap_mmc.c index 46fdeac1121..fcec2899afb 100644 --- a/hw/sd/omap_mmc.c +++ b/hw/sd/omap_mmc.c @@ -583,6 +583,13 @@ static const MemoryRegionOps omap_mmc_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; +void omap_mmc_set_clk(DeviceState *dev, omap_clk clk) +{ + OMAPMMCState *s = OMAP_MMC(dev); + + s->clk = clk; +} + DeviceState *omap_mmc_init(hwaddr base, MemoryRegion *sysmem, qemu_irq irq, qemu_irq dma[], omap_clk clk) @@ -594,7 +601,7 @@ DeviceState *omap_mmc_init(hwaddr base, s = OMAP_MMC(dev); sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal); - s->clk = clk; + omap_mmc_set_clk(dev, clk); memory_region_add_subregion(sysmem, base, sysbus_mmio_get_region(SYS_BUS_DEVICE(s), 0));