@@ -879,27 +879,20 @@ void HELPER(gvec_fcaddh)(void *vd, void *vn, void *vm,
float16 *d = vd;
float16 *n = vn;
float16 *m = vm;
- uint32_t neg_real = extract32(desc, SIMD_DATA_SHIFT, 1);
- uint32_t neg_imag = neg_real ^ 1;
+ bool rot = extract32(desc, SIMD_DATA_SHIFT, 1);
bool fpcr_ah = extract64(desc, SIMD_DATA_SHIFT + 1, 1);
uintptr_t i;
- /* Shift boolean to the sign bit so we can xor to negate. */
- neg_real <<= 15;
- neg_imag <<= 15;
-
for (i = 0; i < opr_sz / 2; i += 2) {
float16 e0 = n[H2(i)];
float16 e1 = m[H2(i + 1)];
float16 e2 = n[H2(i + 1)];
float16 e3 = m[H2(i)];
- /* FPNeg() mustn't flip sign of a NaN if FPCR.AH == 1 */
- if (!(fpcr_ah && float16_is_any_nan(e1))) {
- e1 ^= neg_imag;
- }
- if (!(fpcr_ah && float16_is_any_nan(e3))) {
- e3 ^= neg_real;
+ if (rot) {
+ e3 = float16_maybe_ah_chs(e3, fpcr_ah);
+ } else {
+ e1 = float16_maybe_ah_chs(e1, fpcr_ah);
}
d[H2(i)] = float16_add(e0, e1, fpst);
@@ -915,27 +908,20 @@ void HELPER(gvec_fcadds)(void *vd, void *vn, void *vm,
float32 *d = vd;
float32 *n = vn;
float32 *m = vm;
- uint32_t neg_real = extract32(desc, SIMD_DATA_SHIFT, 1);
- uint32_t neg_imag = neg_real ^ 1;
+ bool rot = extract32(desc, SIMD_DATA_SHIFT, 1);
bool fpcr_ah = extract64(desc, SIMD_DATA_SHIFT + 1, 1);
uintptr_t i;
- /* Shift boolean to the sign bit so we can xor to negate. */
- neg_real <<= 31;
- neg_imag <<= 31;
-
for (i = 0; i < opr_sz / 4; i += 2) {
float32 e0 = n[H4(i)];
float32 e1 = m[H4(i + 1)];
float32 e2 = n[H4(i + 1)];
float32 e3 = m[H4(i)];
- /* FPNeg() mustn't flip sign of a NaN if FPCR.AH == 1 */
- if (!(fpcr_ah && float32_is_any_nan(e1))) {
- e1 ^= neg_imag;
- }
- if (!(fpcr_ah && float32_is_any_nan(e3))) {
- e3 ^= neg_real;
+ if (rot) {
+ e3 = float32_maybe_ah_chs(e3, fpcr_ah);
+ } else {
+ e1 = float32_maybe_ah_chs(e1, fpcr_ah);
}
d[H4(i)] = float32_add(e0, e1, fpst);
@@ -951,27 +937,20 @@ void HELPER(gvec_fcaddd)(void *vd, void *vn, void *vm,
float64 *d = vd;
float64 *n = vn;
float64 *m = vm;
- uint64_t neg_real = extract64(desc, SIMD_DATA_SHIFT, 1);
- uint64_t neg_imag = neg_real ^ 1;
+ bool rot = extract32(desc, SIMD_DATA_SHIFT, 1);
bool fpcr_ah = extract64(desc, SIMD_DATA_SHIFT + 1, 1);
uintptr_t i;
- /* Shift boolean to the sign bit so we can xor to negate. */
- neg_real <<= 63;
- neg_imag <<= 63;
-
for (i = 0; i < opr_sz / 8; i += 2) {
float64 e0 = n[i];
float64 e1 = m[i + 1];
float64 e2 = n[i + 1];
float64 e3 = m[i];
- /* FPNeg() mustn't flip sign of a NaN if FPCR.AH == 1 */
- if (!(fpcr_ah && float64_is_any_nan(e1))) {
- e1 ^= neg_imag;
- }
- if (!(fpcr_ah && float64_is_any_nan(e3))) {
- e3 ^= neg_real;
+ if (rot) {
+ e3 = float64_maybe_ah_chs(e3, fpcr_ah);
+ } else {
+ e1 = float64_maybe_ah_chs(e1, fpcr_ah);
}
d[i] = float64_add(e0, e1, fpst);
The construction of neg_imag and neg_real were done to make it easy to apply both in parallel with two simple logical operations. This changed with FPCR.AH, which is more complex than that. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/tcg/vec_helper.c | 51 +++++++++++-------------------------- 1 file changed, 15 insertions(+), 36 deletions(-)