| Message ID | 20250212154333.28644-7-philmd@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | hw/arm: Explicit number of GIC external IRQs for Cortex A9/A15 MPCore | expand |
On 2/12/25 07:43, Philippe Mathieu-Daudé wrote: > When not specified, Cortex-A9MP configures its GIC with 64 external > IRQs, (see commit a32134aad89 "arm:make the number of GIC interrupts > configurable"), and Cortex-15MP to 128 (see commit 528622421eb > "hw/cpu/a15mpcore: Correct default value for num-irq"). > The Versatile Express board however expects a fixed set of 64 > interrupts (see the fixed IRQ length when this board was added in > commit 2055283bcc8 ("hw/vexpress: Add model of ARM Versatile Express > board"). Add the GIC_EXT_IRQS definition (with a comment) to make > that explicit. > > Except explicitly setting a property value to its same implicit > value, there is no logical change intended. > > Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org> > --- > hw/arm/vexpress.c | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index b886d16c023..9676fc770fb 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -51,6 +51,8 @@ #define VEXPRESS_FLASH_SIZE (64 * 1024 * 1024) #define VEXPRESS_FLASH_SECT_SIZE (256 * 1024) +#define GIC_EXT_IRQS 64 /* Versatile Express A9 development board */ + /* Number of virtio transports to create (0..8; limited by * number of available IRQ lines). */ @@ -241,6 +243,7 @@ static void init_cpus(MachineState *ms, const char *cpu_type, */ dev = qdev_new(privdev); qdev_prop_set_uint32(dev, "num-cpu", smp_cpus); + qdev_prop_set_uint32(dev, "num-irq", GIC_EXT_IRQS + GIC_INTERNAL); busdev = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(busdev, &error_fatal); sysbus_mmio_map(busdev, 0, periphbase); @@ -251,7 +254,7 @@ static void init_cpus(MachineState *ms, const char *cpu_type, * external interrupts starting from 32 (because there * are internal interrupts 0..31). */ - for (n = 0; n < 64; n++) { + for (n = 0; n < GIC_EXT_IRQS; n++) { pic[n] = qdev_get_gpio_in(dev, n); } @@ -543,7 +546,7 @@ static void vexpress_common_init(MachineState *machine) VexpressMachineClass *vmc = VEXPRESS_MACHINE_GET_CLASS(machine); VEDBoardInfo *daughterboard = vmc->daughterboard; DeviceState *dev, *sysctl, *pl041; - qemu_irq pic[64]; + qemu_irq pic[GIC_EXT_IRQS]; uint32_t sys_id; DriveInfo *dinfo; PFlashCFI01 *pflash0;
When not specified, Cortex-A9MP configures its GIC with 64 external IRQs, (see commit a32134aad89 "arm:make the number of GIC interrupts configurable"), and Cortex-15MP to 128 (see commit 528622421eb "hw/cpu/a15mpcore: Correct default value for num-irq"). The Versatile Express board however expects a fixed set of 64 interrupts (see the fixed IRQ length when this board was added in commit 2055283bcc8 ("hw/vexpress: Add model of ARM Versatile Express board"). Add the GIC_EXT_IRQS definition (with a comment) to make that explicit. Except explicitly setting a property value to its same implicit value, there is no logical change intended. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- hw/arm/vexpress.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-)