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Mon, 17 Feb 2025 07:19:51 +0000 (GMT) Received: from smtpav06.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 489032004B; Mon, 17 Feb 2025 07:19:49 +0000 (GMT) Received: from li-3c92a0cc-27cf-11b2-a85c-b804d9ca68fa.in.ibm.com (unknown [9.109.199.160]) by smtpav06.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 17 Feb 2025 07:19:49 +0000 (GMT) From: Aditya Gupta To: Cc: , Nicholas Piggin , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= , Sourabh Jain , Mahesh J Salgaonkar , Hari Bathini Subject: [PATCH 4/7] hw/ppc: Add MDST/MDDT/MDRT table structures and offsets Date: Mon, 17 Feb 2025 12:49:31 +0530 Message-ID: <20250217071934.86131-5-adityag@linux.ibm.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250217071934.86131-1-adityag@linux.ibm.com> References: <20250217071934.86131-1-adityag@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: AAMw5POJWzgvuHWJueigvGTyHie0tNn- X-Proofpoint-ORIG-GUID: J0RXqs7L38oA89wzl0eimTSQoLFKNbD6 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-17_03,2025-02-13_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 phishscore=0 adultscore=0 bulkscore=0 clxscore=1015 suspectscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 mlxscore=0 impostorscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502170060 Received-SPF: pass client-ip=148.163.156.1; envelope-from=adityag@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.01, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add the MDST, MDDT, MDRT tables offsets and structures as per current skiboot upstream: commit bc7b85db1e7e ("opal-ci: Remove centos7") These structures will be later populated when preserving memory regions for MPIPL Signed-off-by: Aditya Gupta --- hw/ppc/pnv_sbe.c | 113 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 113 insertions(+) diff --git a/hw/ppc/pnv_sbe.c b/hw/ppc/pnv_sbe.c index 79818177fc36..361a3854307d 100644 --- a/hw/ppc/pnv_sbe.c +++ b/hw/ppc/pnv_sbe.c @@ -84,6 +84,119 @@ static uint64_t mpipl_skiboot_base = 0x30000000 /*default SKIBOOT_BASE*/; +/* Following offsets are copied from Skiboot source code */ +/* Use 768 bytes for SPIRAH */ +#define SPIRAH_OFF 0x00010000 +#define SPIRAH_SIZE 0x300 + +/* Use 256 bytes for processor dump area */ +#define PROC_DUMP_AREA_OFF (SPIRAH_OFF + SPIRAH_SIZE) +#define PROC_DUMP_AREA_SIZE 0x100 + +#define PROCIN_OFF (PROC_DUMP_AREA_OFF + PROC_DUMP_AREA_SIZE) +#define PROCIN_SIZE 0x800 + +/* Offsets of MDST and MDDT tables from skiboot base */ +#define MDST_TABLE_OFF (PROCIN_OFF + PROCIN_SIZE) +#define MDST_TABLE_SIZE 0x400 + +#define MDDT_TABLE_OFF (MDST_TABLE_OFF + MDST_TABLE_SIZE) +#define MDDT_TABLE_SIZE 0x400 + +#define CPU_CTL_OFF (MDDT_TABLE_OFF + MDDT_TABLE_SIZE) +#define CPU_CTL_SIZE 0x2000 + +/* MPIPL reserved regions (offset by skiboot_base to access) */ +#define MDST_TABLE_BASE (mpipl_skiboot_base + MDST_TABLE_OFF) +#define MDDT_TABLE_BASE (mpipl_skiboot_base + MDDT_TABLE_OFF) +#define PROC_DUMP_AREA_BASE (mpipl_skiboot_base + PROC_DUMP_AREA_OFF) + +#define __packed __attribute__((packed)) + +/* Metadata to capture before triggering MPIPL */ +struct mpipl_metadata { + /* Crashing PIR is required to create OPAL dump */ + uint32_t crashing_pir; + /* Kernel expects OPAL to presrve tag and pass it back via OPAL API */ + uint64_t kernel_tag; + /* Post MPIPL kernel boot memory size */ + uint64_t boot_mem_size; +} __packed; + +/* Structure version */ +#define OPAL_MPIPL_VERSION 0x01 + +/* Preserved memory details */ +struct opal_mpipl_region { + __be64 src; + __be64 dest; + __be64 size; +}; + +struct opal_mpipl_fadump { + uint8_t version; + uint8_t reserved[7]; + __be32 crashing_pir; /* OPAL crashing CPU PIR */ + __be32 cpu_data_version; + __be32 cpu_data_size; + __be32 region_cnt; + struct opal_mpipl_region *region; +}; + +/* + * This is our dump result table after MPIPL. Hostboot will write to this + * memory after moving memory content from source to destination memory. + */ +#define MDRT_TABLE_BASE (mpipl_skiboot_base + 0x01c00000) +#define MDRT_TABLE_SIZE 0x00008000 + +/* + * This is our dump metadata area. We will use this memory to save metadata + * (like crashing CPU details, payload tags) before triggering MPIPL. + */ +#define DUMP_METADATA_AREA_BASE (mpipl_skiboot_base + 0x01c08000) +#define DUMP_METADATA_AREA_SIZE 0x8000 + +/* + * Memory Dump Source Table + * + * Format of this table is same as Memory Dump Source Table (MDST) + * defined in HDAT spec. + */ +struct mdst_table { + __be64 addr; + uint8_t data_region; /* DUMP_REGION_* */ + uint8_t dump_type; /* DUMP_TYPE_* */ + __be16 reserved; + __be32 size; +} __packed; + +/* Memory dump destination table (MDDT) */ +struct mddt_table { + __be64 addr; + uint8_t data_region; + uint8_t dump_type; + __be16 reserved; + __be32 size; +} __packed; + +/* + * Memory dump result table (MDRT) + * + * List of the memory ranges that have been included in the dump. This table is + * filled by hostboot and passed to OPAL on second boot. OPAL/payload will use + * this table to extract the dump. + */ +struct mdrt_table { + __be64 src_addr; + __be64 dest_addr; + uint8_t data_region; + uint8_t dump_type; /* unused */ + __be16 reserved; /* unused */ + __be32 size; + __be64 padding; /* unused */ +} __packed; + static void pnv_sbe_set_host_doorbell(PnvSBE *sbe, uint64_t val) { val &= SBE_HOST_RESPONSE_MASK; /* Is this right? What does HW do? */