diff mbox series

[6/7] hw/ppc: [WIP] Add Processor Dump Area offsets in Pnv SBE

Message ID 20250217071934.86131-7-adityag@linux.ibm.com (mailing list archive)
State New
Headers show
Series Implement MPIPL for PowerNV | expand

Commit Message

Aditya Gupta Feb. 17, 2025, 7:19 a.m. UTC
Add offsets for the processor state captured during MPIPL dump.

This is incomplete. And might be implemented in future if the effort to
implement MPIPL is resumed again.

Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
---
 hw/ppc/pnv_sbe.c | 27 +++++++++++++++++++++++++++
 1 file changed, 27 insertions(+)

Comments

Harsh Prateek Bora March 11, 2025, 5:23 a.m. UTC | #1
On 2/17/25 12:49, Aditya Gupta wrote:
> Add offsets for the processor state captured during MPIPL dump.
> 
> This is incomplete. And might be implemented in future if the effort to
> implement MPIPL is resumed again.

Please use RFC prefix in next iteration of patch series until the 
patches are requested to be merged.

> 
> Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
> ---
>   hw/ppc/pnv_sbe.c | 27 +++++++++++++++++++++++++++
>   1 file changed, 27 insertions(+)
> 
> diff --git a/hw/ppc/pnv_sbe.c b/hw/ppc/pnv_sbe.c
> index ee905df4e0a6..3b50667226b5 100644
> --- a/hw/ppc/pnv_sbe.c
> +++ b/hw/ppc/pnv_sbe.c
> @@ -197,6 +197,25 @@ struct mdrt_table {
>       __be64  padding;    /* unused */
>   } __packed;
>   
> +/*
> + * Processor Dump Area
> + *
> + * This contains the information needed for having processor
> + * state captured during a platform dump.
> + */
> +struct proc_dump_area {
> +    __be32  thread_size;    /* Size of each thread register entry */
> +#define PROC_DUMP_AREA_FORMAT_P9    0x1    /* P9 format */
> +    uint8_t version;
> +    uint8_t reserved[11];
> +    __be64  alloc_addr;    /* Destination memory to place register data */
> +    __be32  reserved2;
> +    __be32  alloc_size;    /* Allocated size */
> +    __be64  dest_addr;     /* Destination address */
> +    __be32  reserved3;
> +    __be32  act_size;      /* Actual data size */
> +} __packed;
> +

Above should go into pnv_sbe.h and introduce when actually get used.

>   static void pnv_sbe_set_host_doorbell(PnvSBE *sbe, uint64_t val)
>   {
>       val &= SBE_HOST_RESPONSE_MASK; /* Is this right? What does HW do? */
> @@ -281,6 +300,11 @@ static void pnv_mpipl_preserve_mem(void)
>       cpu_physical_memory_write(MDRT_TABLE_BASE, mdrt, MDRT_TABLE_SIZE);
>   }
>   
> +static void pnv_mpipl_save_proc_regs(void)
> +{
> +    /* TODO: modify PROC_DUMP_AREA_BASE */
> +}
> +
>   static void pnv_sbe_power9_xscom_ctrl_write(void *opaque, hwaddr addr,
>                                          uint64_t val, unsigned size)
>   {
> @@ -307,6 +331,9 @@ static void pnv_sbe_power9_xscom_ctrl_write(void *opaque, hwaddr addr,
>               /* Preserve the memory locations registered for MPIPL */
>               pnv_mpipl_preserve_mem();
>   
> +            /* Save processor state */
> +            pnv_mpipl_save_proc_regs();

Introduce when actually get implemented, otherwise doesnt need a 
separate patch for this stub.

> +
>               /*
>                * TODO: Pass `mpipl` node in device tree to signify next
>                * boot is an MPIPL boot
diff mbox series

Patch

diff --git a/hw/ppc/pnv_sbe.c b/hw/ppc/pnv_sbe.c
index ee905df4e0a6..3b50667226b5 100644
--- a/hw/ppc/pnv_sbe.c
+++ b/hw/ppc/pnv_sbe.c
@@ -197,6 +197,25 @@  struct mdrt_table {
     __be64  padding;    /* unused */
 } __packed;
 
+/*
+ * Processor Dump Area
+ *
+ * This contains the information needed for having processor
+ * state captured during a platform dump.
+ */
+struct proc_dump_area {
+    __be32  thread_size;    /* Size of each thread register entry */
+#define PROC_DUMP_AREA_FORMAT_P9    0x1    /* P9 format */
+    uint8_t version;
+    uint8_t reserved[11];
+    __be64  alloc_addr;    /* Destination memory to place register data */
+    __be32  reserved2;
+    __be32  alloc_size;    /* Allocated size */
+    __be64  dest_addr;     /* Destination address */
+    __be32  reserved3;
+    __be32  act_size;      /* Actual data size */
+} __packed;
+
 static void pnv_sbe_set_host_doorbell(PnvSBE *sbe, uint64_t val)
 {
     val &= SBE_HOST_RESPONSE_MASK; /* Is this right? What does HW do? */
@@ -281,6 +300,11 @@  static void pnv_mpipl_preserve_mem(void)
     cpu_physical_memory_write(MDRT_TABLE_BASE, mdrt, MDRT_TABLE_SIZE);
 }
 
+static void pnv_mpipl_save_proc_regs(void)
+{
+    /* TODO: modify PROC_DUMP_AREA_BASE */
+}
+
 static void pnv_sbe_power9_xscom_ctrl_write(void *opaque, hwaddr addr,
                                        uint64_t val, unsigned size)
 {
@@ -307,6 +331,9 @@  static void pnv_sbe_power9_xscom_ctrl_write(void *opaque, hwaddr addr,
             /* Preserve the memory locations registered for MPIPL */
             pnv_mpipl_preserve_mem();
 
+            /* Save processor state */
+            pnv_mpipl_save_proc_regs();
+
             /*
              * TODO: Pass `mpipl` node in device tree to signify next
              * boot is an MPIPL boot