[09/22] target/riscv: do not make RISCVCPUConfig fields conditional

Commit Message

Paolo Bonzini Feb. 28, 2025, 10:27 a.m. UTC

Avoid the need for #ifdefs in CPU declarations, keeping them
simple.  After all class_data used to be specified for all
emulators, not just system ones.

Signed-off-by: Paolo Bonzini <[e-mail]>
---
 target/riscv/cpu_cfg_fields.h.inc | 2 --
 target/riscv/cpu.c                | 3 ---
 2 files changed, 5 deletions(-)

Patch

diff --git a/target/riscv/cpu_cfg_fields.h.inc b/target/riscv/cpu_cfg_fields.h.inc
index a42f298017f..a08d85aec26 100644
--- a/target/riscv/cpu_cfg_fields.h.inc
+++ b/target/riscv/cpu_cfg_fields.h.inc
@@ -159,9 +159,7 @@  TYPED_FIELD(uint16_t, cbom_blocksize)
 TYPED_FIELD(uint16_t, cbop_blocksize)
 TYPED_FIELD(uint16_t, cboz_blocksize)
 
-#ifndef CONFIG_USER_ONLY
 TYPED_FIELD(int8_t, max_satp_mode)
-#endif
 
 #undef BOOL_FIELD
 #undef TYPED_FIELD
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index e9d8126360e..cbb6cde082b 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -1483,10 +1483,7 @@  static void riscv_cpu_init(Object *obj)
     cpu->cfg.cbop_blocksize = 64;
     cpu->cfg.cboz_blocksize = 64;
     cpu->env.vext_ver = VEXT_VERSION_1_00_0;
-
-#ifndef CONFIG_USER_ONLY
     cpu->cfg.max_satp_mode = -1;
-#endif /* CONFIG_USER_ONLY */
 
     env->misa_ext_mask = env->misa_ext = mcc->def->misa_ext;
     riscv_cpu_cfg_merge(&cpu->cfg, &mcc->def->cfg);