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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2fe825bb346sm6930596a91.18.2025.02.28.21.27.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Feb 2025 21:27:20 -0800 (PST) From: Brian Cain To: qemu-devel@nongnu.org Cc: brian.cain@oss.qualcomm.com, richard.henderson@linaro.org, philmd@linaro.org, quic_mathbern@quicinc.com, ale@rev.ng, anjo@rev.ng, quic_mliebel@quicinc.com, ltaylorsimpson@gmail.com, alex.bennee@linaro.org, quic_mburton@quicinc.com, sidneym@quicinc.com, Brian Cain Subject: [PATCH 25/38] target/hexagon: Add TCG overrides for thread ctl Date: Fri, 28 Feb 2025 21:26:15 -0800 Message-Id: <20250301052628.1011210-26-brian.cain@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250301052628.1011210-1-brian.cain@oss.qualcomm.com> References: <20250301052628.1011210-1-brian.cain@oss.qualcomm.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: RST-KICdkGw9GghO4GSwq-S_eEAAKltg X-Proofpoint-GUID: RST-KICdkGw9GghO4GSwq-S_eEAAKltg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-03-01_01,2025-02-28_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxlogscore=604 mlxscore=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 clxscore=1015 spamscore=0 adultscore=0 impostorscore=0 malwarescore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2503010040 Received-SPF: pass client-ip=205.220.168.131; envelope-from=brian.cain@oss.qualcomm.com; helo=mx0a-0031df01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Brian Cain Define TCG overrides for start, stop, wait, resume instructions. Signed-off-by: Brian Cain Reviewed-by: Taylor Simpson --- target/hexagon/gen_tcg_sys.h | 18 ++++++++++++++++++ target/hexagon/helper.h | 4 ++++ target/hexagon/op_helper.c | 20 ++++++++++++++++++++ 3 files changed, 42 insertions(+) diff --git a/target/hexagon/gen_tcg_sys.h b/target/hexagon/gen_tcg_sys.h index 642ca3d3ff..942d07b401 100644 --- a/target/hexagon/gen_tcg_sys.h +++ b/target/hexagon/gen_tcg_sys.h @@ -63,4 +63,22 @@ tcg_gen_extrh_i64_i32(ctx->t_sreg_new_value[HEX_SREG_SGP1], tmp); \ } while (0) +#define fGEN_TCG_Y2_wait(SHORTCODE) \ + do { \ + RsV = RsV; \ + gen_helper_wait(tcg_env, tcg_constant_tl(ctx->pkt->pc)); \ + } while (0) + +#define fGEN_TCG_Y2_resume(SHORTCODE) \ + gen_helper_resume(tcg_env, RsV) + +#define fGEN_TCG_Y2_start(SHORTCODE) \ + gen_helper_start(tcg_env, RsV) + +#define fGEN_TCG_Y2_stop(SHORTCODE) \ + do { \ + RsV = RsV; \ + gen_helper_stop(tcg_env); \ + } while (0) + #endif diff --git a/target/hexagon/helper.h b/target/hexagon/helper.h index 2fe4440ddc..ada520bd52 100644 --- a/target/hexagon/helper.h +++ b/target/hexagon/helper.h @@ -124,4 +124,8 @@ DEF_HELPER_2(greg_read_pair, i64, env, i32) DEF_HELPER_3(sreg_write, void, env, i32, i32) DEF_HELPER_3(sreg_write_pair, void, env, i32, i64) DEF_HELPER_3(setprio, void, env, i32, i32) +DEF_HELPER_2(start, void, env, i32) +DEF_HELPER_1(stop, void, env) +DEF_HELPER_2(wait, void, env, i32) +DEF_HELPER_2(resume, void, env, i32) #endif diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c index 575f3fb163..09a5284329 100644 --- a/target/hexagon/op_helper.c +++ b/target/hexagon/op_helper.c @@ -1367,6 +1367,26 @@ uint32_t HELPER(iassignr)(CPUHexagonState *env, uint32_t src) g_assert_not_reached(); } +void HELPER(start)(CPUHexagonState *env, uint32_t imask) +{ + g_assert_not_reached(); +} + +void HELPER(stop)(CPUHexagonState *env) +{ + g_assert_not_reached(); +} + +void HELPER(wait)(CPUHexagonState *env, target_ulong PC) +{ + g_assert_not_reached(); +} + +void HELPER(resume)(CPUHexagonState *env, uint32_t mask) +{ + g_assert_not_reached(); +} + uint32_t HELPER(getimask)(CPUHexagonState *env, uint32_t tid) { g_assert_not_reached();