diff mbox series

[30/38] target/hexagon: Add a TLB count property

Message ID 20250301052628.1011210-31-brian.cain@oss.qualcomm.com (mailing list archive)
State New, archived
Headers show
Series hexagon system emu, part 1/3 | expand

Commit Message

Brian Cain March 1, 2025, 5:26 a.m. UTC 
From: Brian Cain <bcain@quicinc.com>

Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
---
 target/hexagon/cpu.h |  1 +
 target/hexagon/max.h | 26 ++++++++++++++++++++++++++
 target/hexagon/cpu.c |  4 ++++
 3 files changed, 31 insertions(+)
 create mode 100644 target/hexagon/max.h

Comments

Taylor Simpson March 11, 2025, 11:41 p.m. UTC | #1 
> -----Original Message-----
> From: Brian Cain <brian.cain@oss.qualcomm.com>
> Sent: Friday, February 28, 2025 11:26 PM
> To: qemu-devel@nongnu.org
> Cc: brian.cain@oss.qualcomm.com; richard.henderson@linaro.org;
> philmd@linaro.org; quic_mathbern@quicinc.com; ale@rev.ng; anjo@rev.ng;
> quic_mliebel@quicinc.com; ltaylorsimpson@gmail.com;
> alex.bennee@linaro.org; quic_mburton@quicinc.com;
> sidneym@quicinc.com; Brian Cain <bcain@quicinc.com>
> Subject: [PATCH 30/38] target/hexagon: Add a TLB count property
> 
> From: Brian Cain <bcain@quicinc.com>
> 
> Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
> ---


> diff --git a/target/hexagon/max.h b/target/hexagon/max.h new file mode
> 100644 index 0000000000..0f595bcb73
> --- /dev/null
> +++ b/target/hexagon/max.h

Name this file hex_max.h or hexagon_max.h to avoid conflict/confusion with such a common name.

Otherwise
Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Sid Manning March 12, 2025, 2:01 p.m. UTC | #2 
> -----Original Message-----
> From: ltaylorsimpson@gmail.com <ltaylorsimpson@gmail.com>
> Sent: Tuesday, March 11, 2025 6:41 PM
> To: 'Brian Cain' <brian.cain@oss.qualcomm.com>; qemu-devel@nongnu.org
> Cc: richard.henderson@linaro.org; philmd@linaro.org; Matheus Bernardino
> (QUIC) <quic_mathbern@quicinc.com>; ale@rev.ng; anjo@rev.ng; Marco
> Liebel (QUIC) <quic_mliebel@quicinc.com>; alex.bennee@linaro.org; Mark
> Burton (QUIC) <quic_mburton@quicinc.com>; Sid Manning
> <sidneym@quicinc.com>; Brian Cain <bcain@quicinc.com>
> Subject: RE: [PATCH 30/38] target/hexagon: Add a TLB count property
> 
> WARNING: This email originated from outside of Qualcomm. Please be wary
> of any links or attachments, and do not enable macros.
> 
> > -----Original Message-----
> > From: Brian Cain <brian.cain@oss.qualcomm.com>
> > Sent: Friday, February 28, 2025 11:26 PM
> > To: qemu-devel@nongnu.org
> > Cc: brian.cain@oss.qualcomm.com; richard.henderson@linaro.org;
> > philmd@linaro.org; quic_mathbern@quicinc.com; ale@rev.ng;
> anjo@rev.ng;
> > quic_mliebel@quicinc.com; ltaylorsimpson@gmail.com;
> > alex.bennee@linaro.org; quic_mburton@quicinc.com;
> sidneym@quicinc.com;
> > Brian Cain <bcain@quicinc.com>
> > Subject: [PATCH 30/38] target/hexagon: Add a TLB count property
> >
> > From: Brian Cain <bcain@quicinc.com>
> >
> > Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
> > ---
> 
> 
> > diff --git a/target/hexagon/max.h b/target/hexagon/max.h new file mode
> > 100644 index 0000000000..0f595bcb73
> > --- /dev/null
> > +++ b/target/hexagon/max.h
> 
> Name this file hex_max.h or hexagon_max.h to avoid conflict/confusion with
> such a common name.
[Sid Manning] 
This file could be removed for now.  In response to some earlier comments we removed many of the unused #defines leaving just MAX_TLB_ENTRIES which I think could move to cpu.h

> 
> Otherwise
> Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
>
diff mbox series

Patch

diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h
index fb66151ac9..0957faead3 100644
--- a/target/hexagon/cpu.h
+++ b/target/hexagon/cpu.h
@@ -168,6 +168,7 @@  struct ArchCPU {
     bool lldb_compat;
     target_ulong lldb_stack_adjust;
     bool short_circuit;
+    uint32_t num_tlbs;
 };
 
 #include "cpu_bits.h"
diff --git a/target/hexagon/max.h b/target/hexagon/max.h
new file mode 100644
index 0000000000..0f595bcb73
--- /dev/null
+++ b/target/hexagon/max.h
@@ -0,0 +1,26 @@ 
+/*
+ * Copyright (c) 2019-2025 Qualcomm Innovation Center, Inc. All Rights Reserved.
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#ifndef HEXAGON_MAX_H
+#define HEXAGON_MAX_H
+
+#define MAX_EXT_CONTEXTS 8
+#define MAX_L2_INTERLEAVES 2
+#define MAX_VFIFO_COUNT 4
+
+#define SLOTS_MAX 4
+
+#define REG_WRITES_MAX 32
+#define PRED_WRITES_MAX 5
+#define STORES_MAX 2
+#define LOADS_MAX 2
+#define MAX_PRED 4
+
+#define PACKET_BYTES_MAX 16
+#define MAX_TLB_ENTRIES 1024
+#define DTLB_ENTRIES 16
+#define ITLB_ENTRIES 16
+
+#endif /* HEXAGON_MAX_H */
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 908339c052..c4b9df2fc3 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -27,6 +27,7 @@ 
 #include "tcg/tcg.h"
 #include "exec/gdbstub.h"
 #include "cpu_helper.h"
+#include "max.h"
 
 static void hexagon_v66_cpu_init(Object *obj) { }
 static void hexagon_v67_cpu_init(Object *obj) { }
@@ -51,6 +52,9 @@  static ObjectClass *hexagon_cpu_class_by_name(const char *cpu_model)
 }
 
 static const Property hexagon_cpu_properties[] = {
+#if !defined(CONFIG_USER_ONLY)
+    DEFINE_PROP_UINT32("jtlb-entries", HexagonCPU, num_tlbs, MAX_TLB_ENTRIES),
+#endif
     DEFINE_PROP_BOOL("lldb-compat", HexagonCPU, lldb_compat, false),
     DEFINE_PROP_UNSIGNED("lldb-stack-adjust", HexagonCPU, lldb_stack_adjust, 0,
                          qdev_prop_uint32, target_ulong),