| Message ID | 20250301052628.1011210-32-brian.cain@oss.qualcomm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | hexagon system emu, part 1/3 | expand |
> -----Original Message----- > From: Brian Cain <brian.cain@oss.qualcomm.com> > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.cain@oss.qualcomm.com; richard.henderson@linaro.org; > philmd@linaro.org; quic_mathbern@quicinc.com; ale@rev.ng; anjo@rev.ng; > quic_mliebel@quicinc.com; ltaylorsimpson@gmail.com; > alex.bennee@linaro.org; quic_mburton@quicinc.com; > sidneym@quicinc.com; Brian Cain <bcain@quicinc.com> > Subject: [PATCH 31/38] target/hexagon: Add {TLB,k0}lock, cause code, > wait_next_pc > > From: Brian Cain <bcain@quicinc.com> > > {TLB,k0}lock counts are used to represent the TLB, k0 locks among hardware > threads. > > wait_next_pc represents the program counter to set when resuming from a > wait-for-interrupts state. > > cause_code contains the precise exception cause.This will be used by > subsequent commits. > > Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com> Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
> -----Original Message----- > From: Brian Cain <brian.cain@oss.qualcomm.com> > Sent: Friday, February 28, 2025 11:26 PM > To: qemu-devel@nongnu.org > Cc: brian.cain@oss.qualcomm.com; richard.henderson@linaro.org; > philmd@linaro.org; Matheus Bernardino (QUIC) > <quic_mathbern@quicinc.com>; ale@rev.ng; anjo@rev.ng; Marco Liebel > (QUIC) <quic_mliebel@quicinc.com>; ltaylorsimpson@gmail.com; > alex.bennee@linaro.org; Mark Burton (QUIC) > <quic_mburton@quicinc.com>; Sid Manning <sidneym@quicinc.com>; Brian > Cain <bcain@quicinc.com> > Subject: [PATCH 31/38] target/hexagon: Add {TLB,k0}lock, cause code, > wait_next_pc > > From: Brian Cain <bcain@quicinc.com> > > {TLB,k0}lock counts are used to represent the TLB, k0 locks among hardware > threads. > > wait_next_pc represents the program counter to set when resuming from a > wait-for-interrupts state. > > cause_code contains the precise exception cause.This will be used by > subsequent commits. > > Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com> > --- > target/hexagon/cpu.h | 4 ++++ > target/hexagon/cpu.c | 4 ++++ > target/hexagon/machine.c | 4 ++++ > 3 files changed, 12 insertions(+) > > diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index > 0957faead3..ddc1158d8e 100644 > --- a/target/hexagon/cpu.h > +++ b/target/hexagon/cpu.h > @@ -103,6 +103,7 @@ typedef struct { > typedef struct CPUArchState { > target_ulong gpr[TOTAL_PER_THREAD_REGS]; > target_ulong pred[NUM_PREGS]; > + target_ulong cause_code; > > /* For comparing with LLDB on target - see adjust_stack_ptrs function */ > target_ulong last_pc_dumped; > @@ -116,11 +117,14 @@ typedef struct CPUArchState { > target_ulong *g_sreg; > > target_ulong greg[NUM_GREGS]; > + target_ulong wait_next_pc; > > /* This alias of CPUState.cpu_index is used by imported sources: */ > target_ulong threadId; > hex_lock_state_t tlb_lock_state; > hex_lock_state_t k0_lock_state; > + target_ulong tlb_lock_count; > + target_ulong k0_lock_count; > target_ulong next_PC; > #endif > target_ulong new_value_usr; > diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index > c4b9df2fc3..7c34d015a3 100644 > --- a/target/hexagon/cpu.c > +++ b/target/hexagon/cpu.c > @@ -312,7 +312,11 @@ static void hexagon_cpu_reset_hold(Object *obj, > ResetType type) > env->threadId = cs->cpu_index; > env->tlb_lock_state = HEX_LOCK_UNLOCKED; > env->k0_lock_state = HEX_LOCK_UNLOCKED; > + env->tlb_lock_count = 0; > + env->k0_lock_count = 0; > env->next_PC = 0; > + env->wait_next_pc = 0; > + env->cause_code = -1; [Sid Manning] Instead of using -1 this could use HEX_CAUSE_NONE. > #endif > } > > diff --git a/target/hexagon/machine.c b/target/hexagon/machine.c index > dc900422f4..9fdafb4573 100644 > --- a/target/hexagon/machine.c > +++ b/target/hexagon/machine.c > @@ -22,7 +22,11 @@ const VMStateDescription vmstate_hexagon_cpu = { > VMSTATE_UINTTL(env.next_PC, HexagonCPU), > VMSTATE_UINTTL(env.tlb_lock_state, HexagonCPU), > VMSTATE_UINTTL(env.k0_lock_state, HexagonCPU), > + VMSTATE_UINTTL(env.tlb_lock_count, HexagonCPU), > + VMSTATE_UINTTL(env.k0_lock_count, HexagonCPU), > VMSTATE_UINTTL(env.threadId, HexagonCPU), > + VMSTATE_UINTTL(env.cause_code, HexagonCPU), > + VMSTATE_UINTTL(env.wait_next_pc, HexagonCPU), > VMSTATE_END_OF_LIST() > }, > }; > -- > 2.34.1
diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index 0957faead3..ddc1158d8e 100644 --- a/target/hexagon/cpu.h +++ b/target/hexagon/cpu.h @@ -103,6 +103,7 @@ typedef struct { typedef struct CPUArchState { target_ulong gpr[TOTAL_PER_THREAD_REGS]; target_ulong pred[NUM_PREGS]; + target_ulong cause_code; /* For comparing with LLDB on target - see adjust_stack_ptrs function */ target_ulong last_pc_dumped; @@ -116,11 +117,14 @@ typedef struct CPUArchState { target_ulong *g_sreg; target_ulong greg[NUM_GREGS]; + target_ulong wait_next_pc; /* This alias of CPUState.cpu_index is used by imported sources: */ target_ulong threadId; hex_lock_state_t tlb_lock_state; hex_lock_state_t k0_lock_state; + target_ulong tlb_lock_count; + target_ulong k0_lock_count; target_ulong next_PC; #endif target_ulong new_value_usr; diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index c4b9df2fc3..7c34d015a3 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -312,7 +312,11 @@ static void hexagon_cpu_reset_hold(Object *obj, ResetType type) env->threadId = cs->cpu_index; env->tlb_lock_state = HEX_LOCK_UNLOCKED; env->k0_lock_state = HEX_LOCK_UNLOCKED; + env->tlb_lock_count = 0; + env->k0_lock_count = 0; env->next_PC = 0; + env->wait_next_pc = 0; + env->cause_code = -1; #endif } diff --git a/target/hexagon/machine.c b/target/hexagon/machine.c index dc900422f4..9fdafb4573 100644 --- a/target/hexagon/machine.c +++ b/target/hexagon/machine.c @@ -22,7 +22,11 @@ const VMStateDescription vmstate_hexagon_cpu = { VMSTATE_UINTTL(env.next_PC, HexagonCPU), VMSTATE_UINTTL(env.tlb_lock_state, HexagonCPU), VMSTATE_UINTTL(env.k0_lock_state, HexagonCPU), + VMSTATE_UINTTL(env.tlb_lock_count, HexagonCPU), + VMSTATE_UINTTL(env.k0_lock_count, HexagonCPU), VMSTATE_UINTTL(env.threadId, HexagonCPU), + VMSTATE_UINTTL(env.cause_code, HexagonCPU), + VMSTATE_UINTTL(env.wait_next_pc, HexagonCPU), VMSTATE_END_OF_LIST() }, };