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Tsirkin" , Marcel Apfelbaum , Palmer Dabbelt , Alistair Francis , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , qemu-arm@nongnu.org (open list:MCIMX7D SABRE / i...), Jason Chien Subject: [PATCH 1/4] include/hw/pci: Introduce a callback to set the downstream mr of PCI hosts Date: Sat, 8 Mar 2025 04:39:34 +0800 Message-ID: <20250307203952.13871-2-jason.chien@sifive.com> X-Mailer: git-send-email 2.43.2 In-Reply-To: <20250307203952.13871-1-jason.chien@sifive.com> References: <20250307203952.13871-1-jason.chien@sifive.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1029; envelope-from=jason.chien@sifive.com; helo=mail-pj1-x1029.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Many PCI hosts utilize struct PCIIOMMUOps to implement their ATUs, preventing coexistence with IOMMUs, which need to register struct PCIIOMMUOps as well. To resolve this, set_downstream_mr() is introduced, allowing IOMMUs to configure the downstream memory region of the PCI host, enabling both to coexist. Signed-off-by: Jason Chien --- include/hw/pci/pci.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 4002bbeebd..fcf648da19 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -391,6 +391,18 @@ typedef struct PCIIOMMUOps { * @devfn: device and function number */ AddressSpace * (*get_address_space)(PCIBus *bus, void *opaque, int devfn); + /** + * @set_downstream_mr: set the downstream memory region for the PCI host. + * + * Optional callback that should be implemented if a PCI host registers + * this PCIIOMMUOps. It allows an IOMMU to designate its memory region as + * the downstream memory region of the PCI host. + * + * @opaque: the data passed to pci_setup_iommu(). + * + * @mr: the downstream memory region + */ + void (*set_downstream_mr)(void *opaque, MemoryRegion *mr); /** * @set_iommu_device: attach a HostIOMMUDevice to a vIOMMU *