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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3912bfe0004sm12885561f8f.40.2025.03.09.17.06.54 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 09 Mar 2025 17:06:54 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: BALATON Zoltan , qemu-devel@nongnu.org Cc: Steven Lee , Joel Stanley , Bernhard Beschow , Peter Maydell , qemu-arm@nongnu.org, Andrey Smirnov , Paolo Bonzini , Bin Meng , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Eduardo Habkost , qemu-ppc@nongnu.org, =?utf-8?q?Danie?= =?utf-8?q?l_P=2E_Berrang=C3=A9?= , Guenter Roeck , Andrew Jeffery , Troy Lee , Jean-Christophe Dubois , =?utf-8?q?Philippe_Mathieu-Da?= =?utf-8?q?ud=C3=A9?= , qemu-block@nongnu.org, Jamin Lin Subject: [PATCH v5 06/14] hw/sd/sdhci: Introduce SDHCIClass stub Date: Mon, 10 Mar 2025 01:06:12 +0100 Message-ID: <20250310000620.70120-7-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250310000620.70120-1-philmd@linaro.org> References: <20250310000620.70120-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org TYPE_SYSBUS_SDHCI is a bit odd because it uses an union to work with both SysBus / PCI parent. For this reason, we can not use the OBJECT_DECLARE_TYPE() macro twice (on SYSBUS_SDHCI & PCI_SDHCI) and we must keep a pair of lower DECLARE_INSTANCE_CHECKER) and DECLARE_CLASS_CHECKERS() for PCI, in order to avoid: include/hw/sd/sdhci.h:165:1: error: redefinition of 'glib_autoptr_clear_SDHCIState' include/hw/sd/sdhci.h:165:1: error: redefinition of 'glib_autoptr_cleanup_SDHCIState' include/hw/sd/sdhci.h:165:1: error: redefinition of 'glib_autoptr_destroy_SDHCIState' include/hw/sd/sdhci.h:165:1: error: redefinition of 'glib_listautoptr_cleanup_SDHCIState' include/hw/sd/sdhci.h:165:1: error: redefinition of 'glib_slistautoptr_cleanup_SDHCIState' include/hw/sd/sdhci.h:165:1: error: redefinition of 'glib_queueautoptr_cleanup_SDHCIState' 165 | OBJECT_DECLARE_TYPE(SDHCIState, SDHCIClass, SYSBUS_SDHCI) | ^ include/hw/sd/sdhci.h:158:1: note: previous definition is here 158 | OBJECT_DECLARE_TYPE(SDHCIState, SDHCIClass, PCI_SDHCI) | ^ Since we can not use SYSBUS_SDHCI_GET_CLASS() on PCI instances, cache the class reference in the object state as 'sc'. As this is not a normal use, introduce SDHCIClass in its own commit. Signed-off-by: Philippe Mathieu-Daudé --- I plan to remove the union later. --- include/hw/sd/sdhci.h | 17 +++++++++++++---- hw/sd/sdhci-pci.c | 1 + hw/sd/sdhci.c | 3 +++ 3 files changed, 17 insertions(+), 4 deletions(-) diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index 2e6e719df7b..c42aeab6848 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -30,6 +30,8 @@ #include "hw/sd/sd.h" #include "qom/object.h" +typedef struct SDHCIClass SDHCIClass; + /* * SD/MMC host controller state * @@ -41,13 +43,12 @@ * card to be protected). */ struct SDHCIState { - /*< private >*/ union { PCIDevice pcidev; SysBusDevice busdev; }; - /*< public >*/ + SDHCIClass *sc; SDBus sdbus; MemoryRegion iomem; AddressSpace sysbus_dma_as; @@ -110,6 +111,13 @@ struct SDHCIState { }; typedef struct SDHCIState SDHCIState; +struct SDHCIClass { + union { + PCIDeviceClass pci_parent_class; + SysBusDeviceClass sbd_parent_class; + }; +}; + /* * NOTE: This definition is taken out of Linux kernel and so the * original bit number is preserved @@ -126,10 +134,11 @@ enum { #define TYPE_PCI_SDHCI "sdhci-pci" DECLARE_INSTANCE_CHECKER(SDHCIState, PCI_SDHCI, TYPE_PCI_SDHCI) +DECLARE_CLASS_CHECKERS(SDHCIClass, PCI_SDHCI, + TYPE_PCI_SDHCI) #define TYPE_SYSBUS_SDHCI "generic-sdhci" -DECLARE_INSTANCE_CHECKER(SDHCIState, SYSBUS_SDHCI, - TYPE_SYSBUS_SDHCI) +OBJECT_DECLARE_TYPE(SDHCIState, SDHCIClass, SYSBUS_SDHCI) #define TYPE_IMX_USDHC "imx-usdhc" diff --git a/hw/sd/sdhci-pci.c b/hw/sd/sdhci-pci.c index 5268c0dee50..fe62582de90 100644 --- a/hw/sd/sdhci-pci.c +++ b/hw/sd/sdhci-pci.c @@ -73,6 +73,7 @@ static const TypeInfo sdhci_pci_types[] = { .parent = TYPE_PCI_DEVICE, .instance_size = sizeof(SDHCIState), .class_init = sdhci_pci_class_init, + .class_size = sizeof(SDHCIClass), .interfaces = (InterfaceInfo[]) { { INTERFACE_CONVENTIONAL_PCI_DEVICE }, { }, diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index d1b1b187874..176bee6b8f5 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1419,6 +1419,8 @@ static void sdhci_init_readonly_registers(SDHCIState *s, Error **errp) void sdhci_initfn(SDHCIState *s) { + s->sc = (SDHCIClass *)object_get_class(OBJECT(s)); /* Cache QOM parent */ + qbus_init(&s->sdbus, sizeof(s->sdbus), TYPE_SDHCI_BUS, DEVICE(s), "sd-bus"); s->insert_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, @@ -1960,6 +1962,7 @@ static const TypeInfo sdhci_types[] = { .instance_size = sizeof(SDHCIState), .instance_init = sdhci_sysbus_init, .instance_finalize = sdhci_sysbus_finalize, + .class_size = sizeof(SDHCIClass), .class_init = sdhci_sysbus_class_init, }, {