@@ -128,6 +128,7 @@ enum {
#define SET_DC_REGION_CONFIG 0x2
#define GET_DC_REGION_EXTENT_LIST 0x3
#define INITIATE_DC_ADD 0x4
+ #define INITIATE_DC_RELEASE 0x5
};
@@ -3722,6 +3723,10 @@ static CXLRetCode cxl_mbox_dc_prescriptive_sanity_check(CXLType3Dev *dcd,
ext.start_dpa, ext.len)) {
return CXL_MBOX_INVALID_EXTENT_LIST;
}
+ } else if (type == DC_EVENT_RELEASE_CAPACITY) {
+ if (!ct3_test_region_block_backed(dcd, ext.start_dpa, ext.len)) {
+ return CXL_MBOX_INVALID_PA;
+ }
}
}
@@ -3835,6 +3840,88 @@ static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+/*
+ * CXL r3.2 Section 7.6.7.6.6 Initiate Dynamic Capacity Release (Opcode 5605h)
+ */
+static CXLRetCode cmd_fm_initiate_dc_release(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint16_t host_id;
+ uint8_t flags;
+ uint8_t reg_num;
+ uint64_t length;
+ uint8_t tag[0x10];
+ uint32_t ext_count;
+ CXLDCExtentRaw extents[];
+ } QEMU_PACKED *in = (void *)payload_in;
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ g_autofree CXLDCExtentRaw *event_rec_exts = NULL;
+ CXLEventDynamicCapacity event_rec = {};
+ CXLDCExtentRaw ext;
+ int i, rc = 0;
+
+ switch (in->flags & 0x7) {
+ case CXL_EXTENT_REMOVAL_POLICY_PRESCRIPTIVE:
+ rc = cxl_mbox_dc_prescriptive_sanity_check(ct3d,
+ in->host_id,
+ in->ext_count,
+ in->extents,
+ DC_EVENT_RELEASE_CAPACITY);
+ if (rc) {
+ return rc;
+ }
+
+ /* Create extents for Event Record */
+ event_rec_exts = g_new0(CXLDCExtentRaw, in->ext_count);
+ for (i = 0; i < in->ext_count; i++) {
+ ext = in->extents[i];
+ event_rec_exts[i].start_dpa = ext.start_dpa;
+ event_rec_exts[i].len = ext.len;
+ memset(event_rec_exts[i].tag, 0, 0x10);
+ event_rec_exts[i].shared_seq = 0;
+ }
+
+ /* Create event record and insert to event log */
+ cxl_mbox_dc_event_create_record_hdr(ct3d, &event_rec.hdr);
+ event_rec.type = DC_EVENT_RELEASE_CAPACITY;
+ /* FIXME: for now, validity flag is cleared */
+ event_rec.validity_flags = 0;
+ /* FIXME: Currently only support 1 host */
+ event_rec.host_id = 0;
+ /* updated_region_id only valid for DC_EVENT_REGION_CONFIG_UPDATED */
+ event_rec.updated_region_id = 0;
+ for (i = 0; i < in->ext_count; i++) {
+ memcpy(&event_rec.dynamic_capacity_extent,
+ &event_rec_exts[i],
+ sizeof(CXLDCExtentRaw));
+
+ event_rec.flags = 0;
+ if (i < in->ext_count - 1) {
+ /* Set "More" flag */
+ event_rec.flags |= BIT(0);
+ }
+
+ if (cxl_event_insert(&ct3d->cxl_dstate,
+ CXL_EVENT_TYPE_DYNAMIC_CAP,
+ (CXLEventRecordRaw *)&event_rec)) {
+ cxl_event_irq_assert(ct3d);
+ }
+ }
+ return CXL_MBOX_SUCCESS;
+ default:
+ qemu_log_mask(LOG_UNIMP,
+ "CXL extent selection policy not supported.\n");
+ return CXL_MBOX_INVALID_INPUT;
+ }
+
+ return CXL_MBOX_SUCCESS;
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3977,6 +4064,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256] = {
CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
CXL_MBOX_IMMEDIATE_DATA_CHANGE)},
+ [FMAPI_DCD_MGMT][INITIATE_DC_RELEASE] = { "INIT_DC_RELEASE",
+ cmd_fm_initiate_dc_release, ~0,
+ (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
+ CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
+ CXL_MBOX_IMMEDIATE_DATA_CHANGE)},
};
/*