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[2a02:3100:19c6:d00:219:99ff:feb2:2458]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ac3146aed4fsm895944266b.26.2025.03.18.13.57.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Mar 2025 13:57:18 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: Thomas Huth , Bernhard Beschow , qemu-arm@nongnu.org, Peter Maydell , =?utf-8?q?Ph?= =?utf-8?q?ilippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 2/3] hw/arm/fsl-imx8mp: Derive struct FslImx8mpState from TYPE_SYS_BUS_DEVICE Date: Tue, 18 Mar 2025 21:57:08 +0100 Message-ID: <20250318205709.28862-3-shentey@gmail.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250318205709.28862-1-shentey@gmail.com> References: <20250318205709.28862-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62a; envelope-from=shentey@gmail.com; helo=mail-ej1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Deriving from TYPE_SYS_BUS_DEVICE fixes the SoC object to be reset upon machine reset. It also makes the SoC implementation not user-creatable which can trigger the following crash: $ ./qemu-system-aarch64 -M virt -device fsl-imx8mp ** ERROR:../../devel/qemu/tcg/tcg.c:1006:tcg_register_thread: assertion failed: (n < tcg_max_ctxs) Bail out! ERROR:../../devel/qemu/tcg/tcg.c:1006:tcg_register_thread: assertion failed: (n < tcg_max_ctxs) Aborted (core dumped) Fixes: a4eefc69b237 "hw/arm: Add i.MX 8M Plus EVK board" Reported-by: Thomas Huth Suggested-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Signed-off-by: Bernhard Beschow --- include/hw/arm/fsl-imx8mp.h | 3 ++- hw/arm/fsl-imx8mp.c | 2 +- hw/arm/imx8mp-evk.c | 2 +- 3 files changed, 4 insertions(+), 3 deletions(-) diff --git a/include/hw/arm/fsl-imx8mp.h b/include/hw/arm/fsl-imx8mp.h index bc97fc416e..22fdc0d67c 100644 --- a/include/hw/arm/fsl-imx8mp.h +++ b/include/hw/arm/fsl-imx8mp.h @@ -26,6 +26,7 @@ #include "hw/timer/imx_gpt.h" #include "hw/usb/hcd-dwc3.h" #include "hw/watchdog/wdt_imx2.h" +#include "hw/sysbus.h" #include "qom/object.h" #include "qemu/units.h" @@ -49,7 +50,7 @@ enum FslImx8mpConfiguration { }; struct FslImx8mpState { - DeviceState parent_obj; + SysBusDevice parent_obj; ARMCPU cpu[FSL_IMX8MP_NUM_CPUS]; GICv3State gic; diff --git a/hw/arm/fsl-imx8mp.c b/hw/arm/fsl-imx8mp.c index c3f6da6322..82edf61082 100644 --- a/hw/arm/fsl-imx8mp.c +++ b/hw/arm/fsl-imx8mp.c @@ -702,7 +702,7 @@ static void fsl_imx8mp_class_init(ObjectClass *oc, void *data) static const TypeInfo fsl_imx8mp_types[] = { { .name = TYPE_FSL_IMX8MP, - .parent = TYPE_DEVICE, + .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(FslImx8mpState), .instance_init = fsl_imx8mp_init, .class_init = fsl_imx8mp_class_init, diff --git a/hw/arm/imx8mp-evk.c b/hw/arm/imx8mp-evk.c index e1a21e52f9..f17d5db466 100644 --- a/hw/arm/imx8mp-evk.c +++ b/hw/arm/imx8mp-evk.c @@ -37,7 +37,7 @@ static void imx8mp_evk_init(MachineState *machine) s = FSL_IMX8MP(object_new(TYPE_FSL_IMX8MP)); object_property_add_child(OBJECT(machine), "soc", OBJECT(s)); object_property_set_uint(OBJECT(s), "fec1-phy-num", 1, &error_fatal); - qdev_realize_and_unref(DEVICE(s), NULL, &error_fatal); + sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal); memory_region_add_subregion(get_system_memory(), FSL_IMX8MP_RAM_START, machine->ram);