| Message ID | 20250328175526.368121-2-richard.henderson@linaro.org (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | target/mips: Revert TARGET_PAGE_BITS_VARY and bug fixes | expand |
On 28/3/25 18:55, Richard Henderson wrote: > Revert ee3863b9d41 and a08d60bc6c2b. The logic behind changing > the system page size because of what the Loongson kernel "prefers" > is flawed. > > In the Loongson-2E manual, section 5.5, it is clear that the cpu > supports a 4k page size (along with many others). Therefore we > must continue to support a 4k page size. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/mips/cpu-param.h | 5 ----- > hw/mips/fuloong2e.c | 1 - > hw/mips/loongson3_virt.c | 1 - > target/mips/tcg/system/cp0_helper.c | 7 +------ > target/mips/tcg/system/tlb_helper.c | 2 +- > 5 files changed, 2 insertions(+), 14 deletions(-) > diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c > index 646044e274..2a8507b8b0 100644 > --- a/hw/mips/fuloong2e.c > +++ b/hw/mips/fuloong2e.c > @@ -334,7 +334,6 @@ static void mips_fuloong2e_machine_init(MachineClass *mc) > mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E"); > mc->default_ram_size = 256 * MiB; > mc->default_ram_id = "fuloong2e.ram"; > - mc->minimum_page_bits = 14; > machine_add_audiodev_property(mc); > } fuloong2e machine uses a Loongson-2E CPU, which as the manual you pointed out mentions, supports 4K pages. > > diff --git a/hw/mips/loongson3_virt.c b/hw/mips/loongson3_virt.c > index db1cc51314..1da20dccec 100644 > --- a/hw/mips/loongson3_virt.c > +++ b/hw/mips/loongson3_virt.c > @@ -677,7 +677,6 @@ static void loongson3v_machine_class_init(ObjectClass *oc, void *data) > mc->max_cpus = LOONGSON_MAX_VCPUS; > mc->default_ram_id = "loongson3.highram"; > mc->default_ram_size = 1600 * MiB; > - mc->minimum_page_bits = 14; > mc->default_nic = "virtio-net-pci"; > } loongson3v machine uses Loongson-3 series CPUs with TCG, or Loongson-3A4000 with KVM. The Loongson-3A1000 is based on a GS464 core, which does support 4K (chapter 3.5: PageMask register). The Loongson-3A2000 and 3A3000 are based on a GS464E core, which also supports 4K (chapter 7.7 PageMask Register). Address page Mask. The address mask is used to control the size of the page table stored in the page table entry. GS464E supports 4KB to 1GB page size increments of 4. The Loongson-3A4000 is based on a GS464V core, for which I couldn't find the full manual. Being a GS464 with vector capabilities ("The memory functional unit of GS464V is similar with GS464") I'll assume 4K is also OK there. (I'll amend that information to the commit description) Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
diff --git a/target/mips/cpu-param.h b/target/mips/cpu-param.h index 11b3ac0ac6..8fcb1b4f5f 100644 --- a/target/mips/cpu-param.h +++ b/target/mips/cpu-param.h @@ -18,12 +18,7 @@ # define TARGET_VIRT_ADDR_SPACE_BITS 32 #endif #endif -#ifdef CONFIG_USER_ONLY #define TARGET_PAGE_BITS 12 -#else -#define TARGET_PAGE_BITS_VARY -#define TARGET_PAGE_BITS_MIN 12 -#endif #define TCG_GUEST_DEFAULT_MO (0) diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c index 646044e274..2a8507b8b0 100644 --- a/hw/mips/fuloong2e.c +++ b/hw/mips/fuloong2e.c @@ -334,7 +334,6 @@ static void mips_fuloong2e_machine_init(MachineClass *mc) mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E"); mc->default_ram_size = 256 * MiB; mc->default_ram_id = "fuloong2e.ram"; - mc->minimum_page_bits = 14; machine_add_audiodev_property(mc); } diff --git a/hw/mips/loongson3_virt.c b/hw/mips/loongson3_virt.c index db1cc51314..1da20dccec 100644 --- a/hw/mips/loongson3_virt.c +++ b/hw/mips/loongson3_virt.c @@ -677,7 +677,6 @@ static void loongson3v_machine_class_init(ObjectClass *oc, void *data) mc->max_cpus = LOONGSON_MAX_VCPUS; mc->default_ram_id = "loongson3.highram"; mc->default_ram_size = 1600 * MiB; - mc->minimum_page_bits = 14; mc->default_nic = "virtio-net-pci"; } diff --git a/target/mips/tcg/system/cp0_helper.c b/target/mips/tcg/system/cp0_helper.c index 01a07a169f..8c2114c58a 100644 --- a/target/mips/tcg/system/cp0_helper.c +++ b/target/mips/tcg/system/cp0_helper.c @@ -877,18 +877,13 @@ void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask) if ((mask >> maskbits) != 0) { goto invalid; } - /* We don't support VTLB entry smaller than target page */ - if ((maskbits + TARGET_PAGE_BITS_MIN) < TARGET_PAGE_BITS) { - goto invalid; - } env->CP0_PageMask = mask << CP0PM_MASK; return; invalid: /* When invalid, set to default target page size. */ - mask = (~TARGET_PAGE_MASK >> TARGET_PAGE_BITS_MIN); - env->CP0_PageMask = mask << CP0PM_MASK; + env->CP0_PageMask = 0; } void helper_mtc0_pagemask(CPUMIPSState *env, target_ulong arg1) diff --git a/target/mips/tcg/system/tlb_helper.c b/target/mips/tcg/system/tlb_helper.c index ca4d6b27bc..123639fa18 100644 --- a/target/mips/tcg/system/tlb_helper.c +++ b/target/mips/tcg/system/tlb_helper.c @@ -875,7 +875,7 @@ refill: break; } } - pw_pagemask = m >> TARGET_PAGE_BITS_MIN; + pw_pagemask = m >> TARGET_PAGE_BITS; update_pagemask(env, pw_pagemask << CP0PM_MASK, &pw_pagemask); pw_entryhi = (address & ~0x1fff) | (env->CP0_EntryHi & 0xFF); {
Revert ee3863b9d41 and a08d60bc6c2b. The logic behind changing the system page size because of what the Loongson kernel "prefers" is flawed. In the Loongson-2E manual, section 5.5, it is clear that the cpu supports a 4k page size (along with many others). Therefore we must continue to support a 4k page size. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/mips/cpu-param.h | 5 ----- hw/mips/fuloong2e.c | 1 - hw/mips/loongson3_virt.c | 1 - target/mips/tcg/system/cp0_helper.c | 7 +------ target/mips/tcg/system/tlb_helper.c | 2 +- 5 files changed, 2 insertions(+), 14 deletions(-)