Message ID | 20250404152750.332791-2-dbarboza@ventanamicro.com (mailing list archive) |
---|---|
State | New |
Headers | show
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Fri, 04 Apr 2025 08:28:01 -0700 (PDT) Received: from grind.dc1.ventanamicro.com ([177.170.227.223]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2297866e3ecsm33570655ad.198.2025.04.04.08.27.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Apr 2025 08:28:00 -0700 (PDT) From: Daniel Henrique Barboza <dbarboza@ventanamicro.com> To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com, liwei1518@gmail.com, zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com, ajones@ventanamicro.com, Daniel Henrique Barboza <dbarboza@ventanamicro.com> Subject: [PATCH 1/2] target/riscv/tcg: make 'max' cpu rva23s64 compliant Date: Fri, 4 Apr 2025 12:27:49 -0300 Message-ID: <20250404152750.332791-2-dbarboza@ventanamicro.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250404152750.332791-1-dbarboza@ventanamicro.com> References: <20250404152750.332791-1-dbarboza@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::62b; 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Series |
hw/riscv/virt.c: change default CPU to 'max'
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expand
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diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 5aef9eef36..cd489ae35b 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -1486,6 +1486,8 @@ static void riscv_init_max_cpu_extensions(Object *obj) if (cpu->cfg.ext_smdbltrp) { isa_ext_update_enabled(cpu, CPU_CFG_OFFSET(ext_smdbltrp), false); } + + object_property_set_bool(obj, "rva23s64", true, NULL); } static bool riscv_cpu_has_max_extensions(Object *cpu_obj)
The 'max' CPU includes all available extensions we implement, but at this moment it is not rva23s64 compliant due to missing checks that the parent profile (rva22s64) does. Users might expect that the a CPU called 'max' CPU will also compatible with our latest S mode profile. Let's make it official. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> --- target/riscv/tcg/tcg-cpu.c | 2 ++ 1 file changed, 2 insertions(+)