Message ID | 20250404223521.38781-3-philmd@linaro.org (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | target/arm: Remove some TARGET_AARCH64 uses (MTE & gdbstub) | expand |
On 4/4/25 15:35, Philippe Mathieu-Daudé wrote: > It is safe to remove TARGET_AARCH64 #ifdef'ry for code > guarded by runtime check on aa64_sve ISA feature, which > is only available for Aarch64 CPUs. > > Signed-off-by: Philippe Mathieu-Daudé<philmd@linaro.org> > --- > target/arm/cpu.c | 11 ----------- > 1 file changed, 11 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 377791c84dd..95afa9b72f1 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1213,8 +1213,6 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info *info) #endif } -#ifdef TARGET_AARCH64 - static void aarch64_cpu_dump_state(CPUState *cs, FILE *f, int flags) { ARMCPU *cpu = ARM_CPU(cs); @@ -1372,15 +1370,6 @@ static void aarch64_cpu_dump_state(CPUState *cs, FILE *f, int flags) } } -#else - -static inline void aarch64_cpu_dump_state(CPUState *cs, FILE *f, int flags) -{ - g_assert_not_reached(); -} - -#endif - static void arm_cpu_dump_state(CPUState *cs, FILE *f, int flags) { ARMCPU *cpu = ARM_CPU(cs);
It is safe to remove TARGET_AARCH64 #ifdef'ry for code guarded by runtime check on aa64_sve ISA feature, which is only available for Aarch64 CPUs. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- target/arm/cpu.c | 11 ----------- 1 file changed, 11 deletions(-)