| Message ID | 20250407020704.2580294-1-ewanhai-oc@zhaoxin.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [v2] target/i386: Fix model number of Zhaoxin YongFeng vCPU template | expand |
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 1b64ceaaba..0dd9788a68 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5503,7 +5503,7 @@ static const X86CPUDefinition builtin_x86_defs[] = { .level = 0x1F, .vendor = CPUID_VENDOR_ZHAOXIN1, .family = 7, - .model = 11, + .model = 0x5b, .stepping = 3, /* missing: CPUID_HT, CPUID_TM, CPUID_PBE */ .features[FEAT_1_EDX] =
The model number was mistakenly set to 0x0b (11) in commit ff04bc1ac4. The correct value is 0x5b. This mistake occurred because the extended model bits in cpuid[eax=0x1].eax were overlooked, and only the base model was used. This patch corrects the model field. Fixes: ff04bc1ac4 ("target/i386: Introduce Zhaoxin Yongfeng CPU model") Signed-off-by: Ewan Hai <ewanhai-oc@zhaoxin.com> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> --- target/i386/cpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)