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Fri, 29 Jan 2016 16:57:59 -0800 Received: from [172.19.74.182] (port=49976 helo=xsjalistai50.xlnx.xilinx.com) by xsj-tvapsmtp02 with esmtp (Exim 4.63) (envelope-from ) id 1aPJws-0002tR-PC; Fri, 29 Jan 2016 17:03:34 -0800 From: Alistair Francis To: , , Date: Fri, 29 Jan 2016 17:00:59 -0800 Message-ID: <31e7c7dfd48ae5221f9459c16324a0bcd5660a04.1454115217.git.alistair.francis@xilinx.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: References: X-RCIS-Action: ALLOW X-TM-AS-MML: disable X-TM-AS-Product-Ver: IMSS-7.1.0.1679-8.0.0.1202-22054.006 X-TM-AS-Result: No--9.872-7.0-31-10 X-imss-scan-details: No--9.872-7.0-31-10 X-TMASE-MatchedRID: jedmkgCKCjr/uyguzMmOKFz+axQLnAVB5kzxLgNhSikKogmGusPLb5wl aGGOz9d3SYe0ArCcPhjl0ByOo0JQfYdPogR2+s0tA9lly13c/gGH7D1bP/FcOr/A+0D1to6PbCp JOk5WRE8TWPBg+VFf4DdVfPsjrRvqWU/fB/XFmJx0CDjJ3XioBMSgMQYKGHsJEvoxTu3fj1tVJ0 ADqZV4hhytbxuGVtE6+V+tdy2cWjSdsOWs6DEPXriMC5wdwKqdVxZDTO5gDFObKItl61J/yZ+in TK0bC9eKrauXd3MZDUz688Ors6dsK8jvvqYzfzYg8yBxZxAeTMoGOX9xh/h+Lj/2H1IkU9L X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.96; 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SRVR:SN1NAM02HT106; BCL:0; PCL:0; RULEID:; SRVR:SN1NAM02HT106; X-Forefront-PRVS: 083751FCA6 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Jan 2016 01:03:36.7212 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.96]; Helo=[xsj-tvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1NAM02HT106 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 104.47.36.52 Cc: edgar.iglesias@xilinx.com, edgar.iglesias@gmail.com, crosthwaitepeter@gmail.com, afaerber@suse.de, alistair.francis@xilinx.com Subject: [Qemu-devel] [PATCH v3 07/16] register: Add block initialise helper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Peter Crosthwaite Add a helper that will scan a static RegisterAccessInfo Array and populate a container MemoryRegion with registers as defined. Signed-off-by: Peter Crosthwaite Signed-off-by: Alistair Francis --- V3: - Fix typo V2: - Use memory_region_add_subregion_no_print() hw/core/register.c | 29 +++++++++++++++++++++++++++++ include/hw/register.h | 20 ++++++++++++++++++++ 2 files changed, 49 insertions(+) diff --git a/hw/core/register.c b/hw/core/register.c index 939f398..4d7dd95 100644 --- a/hw/core/register.c +++ b/hw/core/register.c @@ -258,6 +258,35 @@ uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size) return register_read_memory(opaque, addr, size, false); } +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae, + int num, RegisterInfo *ri, uint32_t *data, + MemoryRegion *container, const MemoryRegionOps *ops, + bool debug_enabled) +{ + const char *debug_prefix = object_get_typename(OBJECT(owner)); + int i; + + for (i = 0; i < num; i++) { + int index = rae[i].decode.addr / 4; + RegisterInfo *r = &ri[index]; + + *r = (RegisterInfo) { + .data = &data[index], + .data_size = sizeof(uint32_t), + .access = &rae[i], + .debug = debug_enabled, + .prefix = debug_prefix, + .opaque = owner, + }; + register_init(r); + + memory_region_init_io(&r->mem, OBJECT(owner), ops, r, r->access->name, + sizeof(uint32_t)); + memory_region_add_subregion_no_print(container, + r->access->decode.addr, &r->mem); + } +} + static const TypeInfo register_info = { .name = TYPE_REGISTER, .parent = TYPE_DEVICE, diff --git a/include/hw/register.h b/include/hw/register.h index 3316458..30dedbf 100644 --- a/include/hw/register.h +++ b/include/hw/register.h @@ -182,6 +182,26 @@ void register_write_memory_le(void *opaque, hwaddr addr, uint64_t value, uint64_t register_read_memory_be(void *opaque, hwaddr addr, unsigned size); uint64_t register_read_memory_le(void *opaque, hwaddr addr, unsigned size); +/** + * Init a block of consecutive registers into a container MemoryRegion. A + * number of constant register definitions are parsed to create a corresponding + * array of RegisterInfo's. + * + * @owner: device owning the registers + * @rae: Register definitions to init + * @num: number of registers to init (length of @rae) + * @ri: Register array to init + * @data: Array to use for register data + * @container: Memory region to contain new registers + * @ops: Memory region ops to access registers. + * @debug enabled: turn on/off verbose debug information + */ + +void register_init_block32(DeviceState *owner, const RegisterAccessInfo *rae, + int num, RegisterInfo *ri, uint32_t *data, + MemoryRegion *container, const MemoryRegionOps *ops, + bool debug_enabled); + /* Define constants for a 32 bit register */ #define REG32(reg, addr) \ enum { A_ ## reg = (addr) }; \