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Wed, 22 Jun 2016 13:24:11 -0700 Received: from xsj-tvapsmtp02 (smtptest.xilinx.com [172.16.1.203]) by tsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id u5MKHdjK002075; Wed, 22 Jun 2016 13:17:40 -0700 Received: from [172.19.74.182] (port=37782 helo=xsjalistai50.xilinx.com) by xsj-tvapsmtp02 with esmtp (Exim 4.63) (envelope-from ) id 1bFoh0-0004hA-L7; Wed, 22 Jun 2016 13:24:10 -0700 From: Alistair Francis To: , Date: Wed, 22 Jun 2016 13:23:57 -0700 Message-ID: <3b76f343e7e4ba986aafe324d508664c49717c97.1466626975.git.alistair.francis@xilinx.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: X-RCIS-Action: ALLOW X-TM-AS-MML: disable X-TM-AS-Product-Ver: IMSS-7.1.0.1679-8.0.0.1202-22406.005 X-TM-AS-Result: No--10.275-7.0-31-10 X-imss-scan-details: No--10.275-7.0-31-10 X-TMASE-MatchedRID: FqqvQu7ZYnb/uyguzMmOKBWCVBr+Ay98YKeVO7aMEHNUjspoiX02FzQz 47GqDWjpmzdGVlkj6gq+daZEFcM/u13MeDPg67BexEwSTOeVUQ67nrAU9KQxUaJd7mc2dRi3nb6 jRFO110ghMcYfYbjfqxIuFMMW4kD5IaVPgU+koVG628cXbnOhT7BHhbCLbhDI33Nl3elSfsoiTB zOVyM14HtR9RvBzPIjWl6aUM7yZdWRGA23JsTa37CvlllU7Dl1fS0Ip2eEHnz3IzXlXlpamPoLR 4+zsDTtFAQvQYa7pIPlMna8o+p5vvcM9iOX30nPhYCqkiUa7ugF6nuFwdQgjA== X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.96; 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X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(2401047)(13023025)(13018025)(13017025)(13015025)(13024025)(8121501046)(5005006)(10201501046)(3002001)(6055026); SRVR:CY1NAM02HT029; BCL:0; PCL:0; RULEID:; SRVR:CY1NAM02HT029; X-Forefront-PRVS: 0981815F2F X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Jun 2016 20:24:12.1565 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.96]; Helo=[xsj-tvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1NAM02HT029 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 104.47.36.56 Subject: [Qemu-devel] [PATCH v7 05/12] register: QOMify X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, alistair.francis@xilinx.com, crosthwaitepeter@gmail.com, edgar.iglesias@gmail.com, alex.bennee@linaro.org, afaerber@suse.de, fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Peter Crosthwaite QOMify registers as a child of TYPE_DEVICE. This allows registers to define GPIOs. Define an init helper that will do QOM initialisation. Signed-off-by: Peter Crosthwaite Signed-off-by: Alistair Francis Reviewed-by: KONRAD Frederic Reviewed-by: Peter Maydell --- V7: - Remove uneeded struct - Fixup documentation V5: - Convert to using only one memory region hw/core/register.c | 23 +++++++++++++++++++++++ include/hw/register.h | 16 ++++++++++++++++ 2 files changed, 39 insertions(+) diff --git a/hw/core/register.c b/hw/core/register.c index 149aebb..41c11c8 100644 --- a/hw/core/register.c +++ b/hw/core/register.c @@ -155,6 +155,17 @@ void register_reset(RegisterInfo *reg) register_write_val(reg, reg->access->reset); } +void register_init(RegisterInfo *reg) +{ + assert(reg); + + if (!reg->data || !reg->access) { + return; + } + + object_initialize((void *)reg, sizeof(*reg), TYPE_REGISTER); +} + void register_write_memory(void *opaque, hwaddr addr, uint64_t value, unsigned size) { @@ -212,3 +223,15 @@ uint64_t register_read_memory(void *opaque, hwaddr addr, return extract64(read_val, 0, size * 8); } + +static const TypeInfo register_info = { + .name = TYPE_REGISTER, + .parent = TYPE_DEVICE, +}; + +static void register_register_types(void) +{ + type_register_static(®ister_info); +} + +type_init(register_register_types) diff --git a/include/hw/register.h b/include/hw/register.h index 216b679..18a63df 100644 --- a/include/hw/register.h +++ b/include/hw/register.h @@ -11,6 +11,7 @@ #ifndef REGISTER_H #define REGISTER_H +#include "hw/qdev-core.h" #include "exec/memory.h" typedef struct RegisterInfo RegisterInfo; @@ -72,6 +73,9 @@ struct RegisterAccessInfo { */ struct RegisterInfo { + /* */ + DeviceState parent_obj; + /* */ void *data; int data_size; @@ -81,6 +85,9 @@ struct RegisterInfo { void *opaque; }; +#define TYPE_REGISTER "qemu,register" +#define REGISTER(obj) OBJECT_CHECK(RegisterInfo, (obj), TYPE_REGISTER) + /** * This structure is used to group all of the individual registers which are * modeled using the RegisterInfo strucutre. @@ -130,6 +137,15 @@ uint64_t register_read(RegisterInfo *reg, const char* prefix, bool debug); void register_reset(RegisterInfo *reg); /** + * Initialize a register. This will also setup any GPIO links which are used + * to connect register updates in one device to other devices. Generally this + * is useful for interrupt propagation. + * @reg: Register to initialize + */ + +void register_init(RegisterInfo *reg); + +/** * Memory API MMIO write handler that will write to a Register API register. * @opaque: RegisterInfo to write to * @addr: Address to write