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13 Dec 2024 17:48:52 +0800 Received: from ACC-EX16-V03.acc.corpnet.asus (172.29.34.13) by ACC-EX16-V01.acc.corpnet.asus (172.29.34.11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.43; Fri, 13 Dec 2024 17:48:48 +0800 Received: from ACC-EX16-V03.acc.corpnet.asus ([fe80::3dae:532a:2ef6:9654]) by ACC-EX16-V03.acc.corpnet.asus ([fe80::3dae:532a:2ef6:9654%3]) with mapi id 15.01.2507.043; Fri, 13 Dec 2024 17:48:48 +0800 To: =?utf-8?q?=27C=C3=A9dric_Le_Goater=27?= , "'qemu-arm@nongnu.org'" CC: =?utf-8?q?=27C=C3=A9dric_Le_Goater=27?= , =?utf-8?q?=27P?= =?utf-8?q?hilippe_Mathieu-Daud=C3=A9=27?= , "'Jamin Lin'" , 'Andrew Jeffery' , 'Gavin Shan' , "'open list:All patches CC here'" Subject: =?utf-8?b?562U5aSNOiBbUEFUQ0hdIGh3L2FybS9hc3BlZWQ6IGZpeCBjb25uZWN0?= =?utf-8?b?X3NlcmlhbF9oZHNfdG9fdWFydHM=?= Thread-Topic: [PATCH] hw/arm/aspeed: fix connect_serial_hds_to_uarts Thread-Index: AQHbTS9dSL1vUYsQ8E2tdLoBmzCJz7Lj503A Date: Fri, 13 Dec 2024 09:48:48 +0000 Message-ID: <4c9f90399854448497317465c1e4cedc@asus.com> References: <5f9b0c53f1644922ba85522046e92f4c@asus.com> <8af809d7-5fa2-471f-9fc9-eee482988894@kaod.org> In-Reply-To: <8af809d7-5fa2-471f-9fc9-eee482988894@kaod.org> Accept-Language: zh-CN, en-US Content-Language: zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.68.200.222] x-tm-as-product-ver: SMEX-14.0.0.3223-9.1.2019-28826.004 x-tm-as-result: No-10--24.342000-8.000000 x-tmase-matchedrid: EF5z2ETDrAcfHU5fltg9RlY9XYa1m8xA1gfGMJv7tZK1GZp9GnkU8y67 ox+QMz1gAHg/HS2tqGjosUIDPdsTU2s7XhibDX9dUlO0zoIcpU6exJFd1f8r+3NxS8QcqzsbLqc Doo8mZno2c+sa3AtBUqeeKmVKb44CvEQ3AnZS8ITipEa3UDsZRA2LmwHT7i+nX7YFvCOGcWk+ly 66+9jDJLAjxeuur58TI89VAyvsIp0yVLl90PKZQro2KXQsvVZSVPQ3cbOrxNL/GDyR80F454XVe AzWzPHrEiKTmSPOUFcC+EBKhxaceufMaGeNZQ39WZxYhPYYrMlBqFX02wvtDw7PBVWyPtn/9NFK rIIXgXw9NEjD7ulfbyQWr8B5J1Z+zEhV/IuzF6L6KF0S1zktZ+5zvRYCQLoV30z/E8e/OqLjEt1 EiGuYH9FETOOg+TX0tH3PC6sB1AhdXCl/d5Ej2xqsS/8jaA/K1c04BDYxKLaa4ymjlcrDbznxJq un3snzhyRlPlpuvG6bCOivU2HrCzJJUfUG/qfc x-tm-as-user-approved-sender: No x-tm-as-user-blocked-sender: No x-tmase-result: 10--24.342000-8.000000 x-tmase-version: SMEX-14.0.0.3223-9.1.2019-28826.004 x-tm-snts-smtp: 02D2D8B39B737C5B81FB6C2E50EA4C39DC9B2B62D3690B2A6EFE7FFFC0A270682000:9 MIME-Version: 1.0 Received-SPF: pass client-ip=103.10.4.142; envelope-from=prvs=070864293=kenneth_jia@asus.com; helo=ms.asus.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.496, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: =?utf-8?b?S2VubmV0aCBKaWEo6LS+57qq5LicX+WNjuehleS4iua1tyk=?= X-Patchwork-Original-From: kenneth_jia--- via From: kenneth_jia--- via Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org We plans to use a relatively large number of UART connections, and currently test all UARTs that can be used. When we use qumu for simulation, the problem was discovered. The current code does not allocate char devices with index 5 (label serial5). And even if there are more serial devices, the last one (UAR12) is not connected to serial. Add debug information to watch: Test command ~/office_qemu/build/qemu-system-arm -m 1G -M ast2600-evb,fmc-model=mx66l1g45g -nographic \ -drive file=./${evb}.bin,format=raw,if=mtd,unit=0 \ -drive file=./emmc1.bin,format=raw,if=sd,unit=2 \ -net nic -net nic -net nic -net nic \ -net user,hostfwd=::2443-:443,hostfwd=::2242-:22,hostfwd=udp::2623-:623 \ -serial pty \ -serial pty \ -serial pty \ -serial pty \ -serial pty \ -serial pty \ -serial pty \ -serial pty \ -serial pty \ -serial pty \ -serial pty \ -serial pty \ -serial pty \ -serial pty Output Log: QEMU 9.2.50 monitor - type 'help' for more information char device redirected to /dev/pts/6 (label serial0) char device redirected to /dev/pts/7 (label serial1) char device redirected to /dev/pts/8 (label serial2) char device redirected to /dev/pts/9 (label serial3) char device redirected to /dev/pts/10 (label serial4) char device redirected to /dev/pts/11 (label serial5) char device redirected to /dev/pts/12 (label serial6) char device redirected to /dev/pts/13 (label serial7) char device redirected to /dev/pts/14 (label serial8) char device redirected to /dev/pts/15 (label serial9) char device redirected to /dev/pts/16 (label serial10) char device redirected to /dev/pts/17 (label serial11) char device redirected to /dev/pts/19 (label serial12) char device redirected to /dev/pts/21 (label serial13) char device redirected to /dev/pts/22 (label serial14) uart 0 char index 1 name pty:/dev/pts/7 uart 1 char index 2 name pty:/dev/pts/8 uart 2 char index 3 name pty:/dev/pts/9 uart 3 char index 4 name pty:/dev/pts/10 uart 5 char index 6 name pty:/dev/pts/12 uart 6 char index 7 name pty:/dev/pts/13 uart 7 char index 8 name pty:/dev/pts/14 uart 8 char index 9 name pty:/dev/pts/15 uart 9 char index 10 name pty:/dev/pts/16 uart 10 char index 11 name pty:/dev/pts/17 uart 11 char index 12 name pty:/dev/pts/19 (qemu) Issue: /dev/pts/17 (label serial11) is not connected to a UART, UART12 is not connect to a serial device. -----邮件原件----- 发件人: Cédric Le Goater 发送时间: 2024年12月13日 15:19 收件人: Kenneth Jia(贾纪东_华硕上海) ; 'qemu-arm@nongnu.org' 抄送: 'Cédric Le Goater' ; 'Philippe Mathieu-Daudé' > Subject: [PATCH]    hw/arm/aspeed: fix connect_serial_hds_to_uarts > >    In the loop, we need ignore the index increase when uart == > uart_chosen > >    We should increase the index only after we allocate a serial. > > Signed-off-by: Kenneth Jia Could you please tell us a bit on your test environment ? I am interested to know how you found the issue. Also, please use "git send-email" to send patches. Anyhow, Fixes: d2b3eaefb4d7 ("aspeed: Refactor UART init for multi-SoC machines") Reviewed-by: Cédric Le Goater Thanks, C. > > --- > > hw/arm/aspeed.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c > > index 556498f2a0..d8cb2d1429 100644 > > --- a/hw/arm/aspeed.c > > +++ b/hw/arm/aspeed.c > > @@ -364,11 +364,11 @@ static void > connect_serial_hds_to_uarts(AspeedMachineState *bmc) > >      int uart_chosen = bmc->uart_chosen ? bmc->uart_chosen : > amc->uart_default; > >      aspeed_soc_uart_set_chr(s, uart_chosen, serial_hd(0)); > > -    for (int i = 1, uart = sc->uarts_base; i < sc->uarts_num; i++, > uart++) { > > +    for (int i = 1, uart = sc->uarts_base; i < sc->uarts_num; uart++) > +{ > >          if (uart == uart_chosen) { > >              continue; > >          } > > -        aspeed_soc_uart_set_chr(s, uart, serial_hd(i)); > > +        aspeed_soc_uart_set_chr(s, uart, serial_hd(i++)); > >      } > > } > > -- > > 2.34.1 >

diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 556498f2a0..786df450ed 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -369,6 +369,7 @@ static void connect_serial_hds_to_uarts(AspeedMachineState *bmc) continue; } aspeed_soc_uart_set_chr(s, uart, serial_hd(i)); + printf("uart %d char index %d name %s\n", uart-sc->uarts_base, i, serial_hd(i)?serial_hd(i)->filename:"null"); } }