diff mbox series

[v3,11/12] target/arm/kvm: spe: Enable userspace irqchip support.

Message ID 6e6ef8d1ea15180514a6f1540933aca4d59939a8.1600135462.git.haibo.xu@linaro.org (mailing list archive)
State New, archived
Headers show
Series target/arm: Add vSPE support to KVM guest | expand

Commit Message

Haibo Xu Sept. 15, 2020, 3:11 a.m. UTC 
Since the current kernel patches haven't enabled the
userspace irqchip support, this patch is not verified yet!

Reviewed-by: Andrew Jones <drjones@redhat.com>
Signed-off-by: Haibo Xu <haibo.xu@linaro.org>
---
 hw/arm/virt.c    | 2 +-
 target/arm/kvm.c | 5 +++++
 2 files changed, 6 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index ee0831922b..bdb1ce925c 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1715,8 +1715,8 @@  static void virt_cpu_post_init(VirtMachineState *vms)
                 assert(ARM_CPU(cpu)->has_spe == ON_OFF_AUTO_ON);
                 if (kvm_irqchip_in_kernel()) {
                     kvm_arm_spe_set_irq(cpu, PPI(VIRTUAL_SPE_IRQ));
-                    kvm_arm_spe_init(cpu);
                 }
+                kvm_arm_spe_init(cpu);
             }
         }
     } else {
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index 58f991e890..7950ff1d83 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -820,6 +820,11 @@  MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
             switched_level &= ~KVM_ARM_DEV_PMU;
         }
 
+        if (switched_level & KVM_ARM_DEV_SPE) {
+            qemu_set_irq(cpu->spe_interrupt,
+                         !!(run->s.regs.device_irq_level & KVM_ARM_DEV_SPE));
+            switched_level &= ~KVM_ARM_DEV_SPE;
+        }
         if (switched_level) {
             qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n",
                           __func__, switched_level);