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[v1,1/1] tcg/riscv: Fix RISC-VH host build failure

Message ID 79729cc88ca509e08b5c4aa0aa8a52847af70c0f.1561039316.git.alistair.francis@wdc.com (mailing list archive)
State New, archived
Headers show
Series [v1,1/1] tcg/riscv: Fix RISC-VH host build failure | expand

Commit Message

Alistair Francis June 20, 2019, 2:04 p.m. UTC 
Commit 269bd5d8 "cpu: Move the softmmu tlb to CPUNegativeOffsetState'
broke the RISC-V host build as there are two variables that are used but
not defined.

This patch renames the undefined variables mask_off and table_off to the
existing (but unused) mask_ofs and table_ofs variables.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 tcg/riscv/tcg-target.inc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Richard Henderson June 25, 2019, 2:37 p.m. UTC | #1 
On 6/20/19 4:04 PM, Alistair Francis wrote:
> Commit 269bd5d8 "cpu: Move the softmmu tlb to CPUNegativeOffsetState'
> broke the RISC-V host build as there are two variables that are used but
> not defined.
> 
> This patch renames the undefined variables mask_off and table_off to the
> existing (but unused) mask_ofs and table_ofs variables.
> 
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

Oops.  Thanks, queued.


r~
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Patch

diff --git a/tcg/riscv/tcg-target.inc.c b/tcg/riscv/tcg-target.inc.c
index 1f0ae64aae..3e76bf5738 100644
--- a/tcg/riscv/tcg-target.inc.c
+++ b/tcg/riscv/tcg-target.inc.c
@@ -980,8 +980,8 @@  static void tcg_out_tlb_load(TCGContext *s, TCGReg addrl,
     int table_ofs = fast_ofs + offsetof(CPUTLBDescFast, table);
     TCGReg mask_base = TCG_AREG0, table_base = TCG_AREG0;
 
-    tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP0, mask_base, mask_off);
-    tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, table_base, table_off);
+    tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP0, mask_base, mask_ofs);
+    tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, table_base, table_ofs);
 
     tcg_out_opc_imm(s, OPC_SRLI, TCG_REG_TMP2, addrl,
                     TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);