From patchwork Wed Dec 26 08:25:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yang, Weijiang" X-Patchwork-Id: 10742919 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D3B32924 for ; Wed, 26 Dec 2018 08:24:51 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B990D283E7 for ; Wed, 26 Dec 2018 08:24:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AD86528957; Wed, 26 Dec 2018 08:24:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4312F283E7 for ; Wed, 26 Dec 2018 08:24:50 +0000 (UTC) Received: from localhost ([127.0.0.1]:44873 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gc4Uj-0000sQ-D2 for patchwork-qemu-devel@patchwork.kernel.org; Wed, 26 Dec 2018 03:24:49 -0500 Received: from eggs.gnu.org ([208.118.235.92]:50687) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gc4RL-0005nM-37 for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gc4RJ-0005rt-54 for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:19 -0500 Received: from mga06.intel.com ([134.134.136.31]:14750) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gc4RH-0005q6-6d for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:16 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Dec 2018 00:21:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,400,1539673200"; d="scan'208";a="103379586" Received: from unknown (HELO localhost.localdomain.sh.intel.com) ([10.239.13.104]) by orsmga006.jf.intel.com with ESMTP; 26 Dec 2018 00:21:10 -0800 From: Yang Weijiang To: qemu-devel@nongnu.org, pbonzini@redhat.com, rkrcmar@redhat.com, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, mst@redhat.com, yu-cheng.yu@intel.com, yi.z.zhang@intel.com, hjl.tools@gmail.com Date: Wed, 26 Dec 2018 16:25:19 +0800 Message-Id: <7a6de6a8c37161fc207f7003fc0e762045fb4028.1545806972.git.weijiang.yang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH 3/4] Add hepler functions for CPUID xsave area size calculation. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Weijiang , Zhang Yi Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP These functions are called when return CPUID xsave area size information. Signed-off-by: Zhang Yi Signed-off-by: Yang Weijiang --- target/i386/cpu.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 3630c688d6..cf4f2798dc 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1281,12 +1281,34 @@ static inline bool accel_uses_host_cpuid(void) return kvm_enabled() || hvf_enabled(); } +static uint32_t xsave_area_size_compat(uint64_t mask) +{ + int i; + uint64_t ret = 0; + uint32_t offset; + + for (i = 0; i < ARRAY_SIZE(x86_ext_save_areas); i++) { + const ExtSaveArea *esa = &x86_ext_save_areas[i]; + offset = i > 1 ? ret : esa->offset; + if ((mask >> i) & 1) { + ret = MAX(ret, offset + esa->size); + } + } + return ret; +} + static inline uint64_t x86_cpu_xsave_components(X86CPU *cpu) { return ((uint64_t)cpu->env.features[FEAT_XSAVE_COMP_HI]) << 32 | cpu->env.features[FEAT_XSAVE_COMP_LO]; } +static inline uint64_t x86_cpu_xsave_sv_components(X86CPU *cpu) +{ + return ((uint64_t)cpu->env.features[FEAT_XSAVE_SV_HI]) << 32 | + cpu->env.features[FEAT_XSAVE_SV_LO]; +} + const char *get_register_name_32(unsigned int reg) { if (reg >= CPU_NB_REGS32) { @@ -4913,8 +4935,10 @@ static void x86_cpu_enable_xsave_components(X86CPU *cpu) } } - env->features[FEAT_XSAVE_COMP_LO] = mask; + env->features[FEAT_XSAVE_COMP_LO] = mask & CPUID_XSTATE_USER_MASK; env->features[FEAT_XSAVE_COMP_HI] = mask >> 32; + env->features[FEAT_XSAVE_SV_LO] = mask & CPUID_XSTATE_KERNEL_MASK; + env->features[FEAT_XSAVE_SV_HI] = mask >> 32; } /***** Steps involved on loading and filtering CPUID data