@@ -1349,6 +1349,17 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp)
return;
}
}
+
+ /*
+ * Currently, vCPU feature 'el2' only supported in KVM mode.
+ */
+ if (kvm_enabled()) {
+ arm_cpu_el2_finalize(cpu, &local_err);
+ if (local_err != NULL) {
+ error_propagate(errp, local_err);
+ return;
+ }
+ }
}
if (kvm_enabled()) {
@@ -203,10 +203,12 @@ typedef struct {
# define ARM_MAX_VQ 16
void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp);
void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp);
+void arm_cpu_el2_finalize(ARMCPU *cpu, Error **errp);
#else
# define ARM_MAX_VQ 1
static inline void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) { }
static inline void arm_cpu_pauth_finalize(ARMCPU *cpu, Error **errp) { }
+static inline void arm_cpu_el2_finalize(ARMCPU *cpu, Error **errp) { }
#endif
typedef struct ARMVectorReg {
@@ -1058,6 +1060,7 @@ void aarch64_sve_narrow_vq(CPUARMState *env, unsigned vq);
void aarch64_sve_change_el(CPUARMState *env, int old_el,
int new_el, bool el0_a64);
void aarch64_add_sve_properties(Object *obj);
+void aarch64_add_el2_properties(Object *obj);
/*
* SVE registers are encoded in KVM's memory in an endianness-invariant format.
@@ -1089,6 +1092,7 @@ static inline void aarch64_sve_change_el(CPUARMState *env, int o,
int n, bool a)
{ }
static inline void aarch64_add_sve_properties(Object *obj) { }
+static inline void aarch64_add_el2_properties(Object *obj) { }
#endif
void aarch64_sync_32_to_64(CPUARMState *env);
@@ -603,6 +603,58 @@ static Property arm_cpu_pauth_property =
static Property arm_cpu_pauth_impdef_property =
DEFINE_PROP_BOOL("pauth-impdef", ARMCPU, prop_pauth_impdef, false);
+void arm_cpu_el2_finalize(ARMCPU *cpu, Error **errp)
+{
+ if (cpu->has_el2) {
+ if (!kvm_enabled() || !kvm_arm_el2_supported()) {
+ error_setg(errp, "'el2' cannot be enabled on this host");
+ return;
+ }
+ }
+
+ if (cpu->has_el2) {
+ set_feature(&cpu->env, ARM_FEATURE_EL2);
+ } else {
+ unset_feature(&cpu->env, ARM_FEATURE_EL2);
+ }
+}
+
+static bool arm_get_el2(Object *obj, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+
+ return cpu->has_el2;
+}
+
+static void arm_set_el2(Object *obj, bool value, Error **errp)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+
+ if (value) {
+ if (!kvm_enabled() || !kvm_arm_el2_supported()) {
+ error_setg(errp, "'el2' cannot be enabled on this host");
+ return;
+ }
+ set_feature(&cpu->env, ARM_FEATURE_EL2);
+ } else {
+ unset_feature(&cpu->env, ARM_FEATURE_EL2);
+ }
+
+ cpu->has_el2 = value;
+}
+
+void aarch64_add_el2_properties(Object *obj)
+{
+ /*
+ * vCPU feature 'el2' is only available in KVM mode, and is
+ * disabled by default to keep in line with that in TCG mode.
+ */
+ ARM_CPU(obj)->has_el2 = false;
+ object_property_add_bool(obj, "el2", arm_get_el2, arm_set_el2);
+ object_property_set_description(obj, "el2", "Set off to disable "
+ "nested virtulization.");
+}
+
/* -cpu max: if KVM is enabled, like -cpu host (best possible with this host);
* otherwise, a CPU with as many features enabled as our emulation supports.
* The version of '-cpu max' for qemu-system-arm is defined in cpu.c;
Adds an el2=[on/off] option to enable/disable el2(nested virtualization) support in KVM guest vCPU. Signed-off-by: Haibo Xu <haibo.xu@linaro.org> --- target/arm/cpu.c | 11 ++++++++++ target/arm/cpu.h | 4 ++++ target/arm/cpu64.c | 52 ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 67 insertions(+)