[RFC,v2,74/78] hw/cxl/cxl-device-utils.c: add fallthrough pseudo-keyword

Commit Message

Manos Pitsidianakis Oct. 13, 2023, 7:57 a.m. UTC

In preparation of raising -Wimplicit-fallthrough to 5, replace all
fall-through comments with the fallthrough attribute pseudo-keyword.

Signed-off-by: Emmanouil Pitsidianakis <[e-mail]>
---
 hw/cxl/cxl-device-utils.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Patch

diff --git a/hw/cxl/cxl-device-utils.c b/hw/cxl/cxl-device-utils.c
index bd68328032..63f009847e 100644
--- a/hw/cxl/cxl-device-utils.c
+++ b/hw/cxl/cxl-device-utils.c
@@ -78,18 +78,18 @@  static uint64_t mailbox_reg_read(void *opaque, hwaddr offset, unsigned size)
 static void mailbox_mem_writel(uint32_t *reg_state, hwaddr offset,
                                uint64_t value)
 {
     switch (offset) {
     case A_CXL_DEV_MAILBOX_CTRL:
-        /* fallthrough */
+        fallthrough;
     case A_CXL_DEV_MAILBOX_CAP:
         /* RO register */
         break;
     default:
         qemu_log_mask(LOG_UNIMP,
                       "%s Unexpected 32-bit access to 0x%" PRIx64 " (WI)\n",
                       __func__, offset);
         return;
     }
 
     reg_state[offset / sizeof(*reg_state)] = value;
 }
@@ -97,22 +97,22 @@  static void mailbox_mem_writel(uint32_t *reg_state, hwaddr offset,
 static void mailbox_mem_writeq(uint64_t *reg_state, hwaddr offset,
                                uint64_t value)
 {
     switch (offset) {
     case A_CXL_DEV_MAILBOX_CMD:
         break;
     case A_CXL_DEV_BG_CMD_STS:
         /* BG not supported */
-        /* fallthrough */
+        fallthrough;
     case A_CXL_DEV_MAILBOX_STS:
         /* Read only register, will get updated by the state machine */
         return;
     default:
         qemu_log_mask(LOG_UNIMP,
                       "%s Unexpected 64-bit access to 0x%" PRIx64 " (WI)\n",
                       __func__, offset);
         return;
     }
 
 
     reg_state[offset / sizeof(*reg_state)] = value;
 }