diff mbox series

[v1,06/21] ppc: correct typos

Message ID 95ffc19d9c3877052a1a6dabf91e139fda183427.1708419115.git.manos.pitsidianakis@linaro.org (mailing list archive)
State New, archived
Headers show
Series Trivial tree wide typo fixes | expand

Commit Message

Manos Pitsidianakis Feb. 20, 2024, 8:52 a.m. UTC
Correct typos automatically found with the `typos` tool
<https://crates.io/crates/typos>

Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
---
 include/hw/ppc/ppc4xx.h             | 2 +-
 hw/ppc/ppc405.h                     | 2 +-
 target/ppc/translate/vmx-impl.c.inc | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

Comments

BALATON Zoltan Feb. 20, 2024, 12:12 p.m. UTC | #1
On Tue, 20 Feb 2024, Manos Pitsidianakis wrote:
> Correct typos automatically found with the `typos` tool
> <https://crates.io/crates/typos>
>
> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
> ---
> include/hw/ppc/ppc4xx.h             | 2 +-
> hw/ppc/ppc405.h                     | 2 +-
> target/ppc/translate/vmx-impl.c.inc | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h
> index ea7740239b..c4ecb1652f 100644
> --- a/include/hw/ppc/ppc4xx.h
> +++ b/include/hw/ppc/ppc4xx.h
> @@ -75,7 +75,7 @@ struct Ppc4xxMalState {
>     uint8_t  rxcnum;
> };
>
> -/* Peripheral local bus arbitrer */
> +/* Peripheral local bus arbiter */
> #define TYPE_PPC4xx_PLB "ppc4xx-plb"
> OBJECT_DECLARE_SIMPLE_TYPE(Ppc4xxPlbState, PPC4xx_PLB);
> struct Ppc4xxPlbState {
> diff --git a/hw/ppc/ppc405.h b/hw/ppc/ppc405.h
> index 9a4312691e..a39f0caea1 100644
> --- a/hw/ppc/ppc405.h
> +++ b/hw/ppc/ppc405.h
> @@ -41,7 +41,7 @@ struct Ppc405PobState {
>     uint32_t besr1;
> };
>
> -/* OPB arbitrer */
> +/* OPB arbiter */

These two aren't actually typos. The PPC docs call it that. Somebody tried 
to fix these before but this spelling is also valid and what is used in 
the docs.

> #define TYPE_PPC405_OPBA "ppc405-opba"
> OBJECT_DECLARE_SIMPLE_TYPE(Ppc405OpbaState, PPC405_OPBA);
> struct Ppc405OpbaState {
> diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc
> index 4b91c3489d..b56e615c24 100644
> --- a/target/ppc/translate/vmx-impl.c.inc
> +++ b/target/ppc/translate/vmx-impl.c.inc
> @@ -1183,7 +1183,7 @@ static void glue(gen_, name)(DisasContext *ctx)                         \
>
> /*
>  * Support for Altivec instructions that use bit 31 (Rc) as an opcode
> - * bit but also use bit 21 as an actual Rc bit.  In general, thse pairs
> + * bit but also use bit 21 as an actual Rc bit.  In general, these pairs

This one is a typo.

Regards,
BALATON Zoltan

>  * come from different versions of the ISA, so we must also support a
>  * pair of flags for each instruction.
>  */
>
diff mbox series

Patch

diff --git a/include/hw/ppc/ppc4xx.h b/include/hw/ppc/ppc4xx.h
index ea7740239b..c4ecb1652f 100644
--- a/include/hw/ppc/ppc4xx.h
+++ b/include/hw/ppc/ppc4xx.h
@@ -75,7 +75,7 @@  struct Ppc4xxMalState {
     uint8_t  rxcnum;
 };
 
-/* Peripheral local bus arbitrer */
+/* Peripheral local bus arbiter */
 #define TYPE_PPC4xx_PLB "ppc4xx-plb"
 OBJECT_DECLARE_SIMPLE_TYPE(Ppc4xxPlbState, PPC4xx_PLB);
 struct Ppc4xxPlbState {
diff --git a/hw/ppc/ppc405.h b/hw/ppc/ppc405.h
index 9a4312691e..a39f0caea1 100644
--- a/hw/ppc/ppc405.h
+++ b/hw/ppc/ppc405.h
@@ -41,7 +41,7 @@  struct Ppc405PobState {
     uint32_t besr1;
 };
 
-/* OPB arbitrer */
+/* OPB arbiter */
 #define TYPE_PPC405_OPBA "ppc405-opba"
 OBJECT_DECLARE_SIMPLE_TYPE(Ppc405OpbaState, PPC405_OPBA);
 struct Ppc405OpbaState {
diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc
index 4b91c3489d..b56e615c24 100644
--- a/target/ppc/translate/vmx-impl.c.inc
+++ b/target/ppc/translate/vmx-impl.c.inc
@@ -1183,7 +1183,7 @@  static void glue(gen_, name)(DisasContext *ctx)                         \
 
 /*
  * Support for Altivec instructions that use bit 31 (Rc) as an opcode
- * bit but also use bit 21 as an actual Rc bit.  In general, thse pairs
+ * bit but also use bit 21 as an actual Rc bit.  In general, these pairs
  * come from different versions of the ISA, so we must also support a
  * pair of flags for each instruction.
  */