From patchwork Sat Feb 6 00:55:16 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 8240871 Return-Path: X-Original-To: patchwork-qemu-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 133A19F37A for ; Sat, 6 Feb 2016 00:58:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6093C203C2 for ; Sat, 6 Feb 2016 00:58:15 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7636D203B4 for ; Sat, 6 Feb 2016 00:58:14 +0000 (UTC) Received: from localhost ([::1]:51127 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aRrCX-0004EM-Sy for patchwork-qemu-devel@patchwork.kernel.org; Fri, 05 Feb 2016 19:58:13 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38502) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aRrCM-0004Bn-T6 for qemu-devel@nongnu.org; Fri, 05 Feb 2016 19:58:04 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aRrCJ-0001UH-L9 for qemu-devel@nongnu.org; Fri, 05 Feb 2016 19:58:02 -0500 Received: from mail-cys01nam02on0066.outbound.protection.outlook.com ([104.47.37.66]:52896 helo=NAM02-CY1-obe.outbound.protection.outlook.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aRrCJ-0001U7-CV for qemu-devel@nongnu.org; Fri, 05 Feb 2016 19:57:59 -0500 Received: from BL2NAM02FT034.eop-nam02.prod.protection.outlook.com (10.152.76.59) by BL2NAM02HT040.eop-nam02.prod.protection.outlook.com (10.152.77.26) with Microsoft SMTP Server (TLS) id 15.1.409.7; Sat, 6 Feb 2016 00:57:56 +0000 Authentication-Results: spf=fail (sender IP is 149.199.60.96) smtp.mailfrom=xilinx.com; codeaurora.org; dkim=none (message not signed) header.d=none; codeaurora.org; dmarc=none action=none header.from=xilinx.com; Received-SPF: Fail (protection.outlook.com: domain of xilinx.com does not designate 149.199.60.96 as permitted sender) receiver=protection.outlook.com; client-ip=149.199.60.96; helo=xsj-tvapsmtpgw01; Received: from xsj-tvapsmtpgw01 (149.199.60.96) by BL2NAM02FT034.mail.protection.outlook.com (10.152.77.161) with Microsoft SMTP Server (TLS) id 15.1.409.7 via Frontend Transport; Sat, 6 Feb 2016 00:57:56 +0000 Received: from 172-16-1-203.xilinx.com ([172.16.1.203]:41919 helo=xsj-tvapsmtp02.xilinx.com) by xsj-tvapsmtpgw01 with esmtp (Exim 4.63) (envelope-from ) id 1aRrCF-0000hU-PQ; Fri, 05 Feb 2016 16:57:55 -0800 Received: from [127.0.0.1] (port=49137 helo=tsj-smtp-dlp1.xlnx.xilinx.com) by xsj-tvapsmtp02.xilinx.com with esmtp (Exim 4.63) (envelope-from ) id 1aRrCF-0002HI-JQ; Fri, 05 Feb 2016 16:57:55 -0800 Received: from xsj-tvapsmtp02 (xsj-tvapsmtp02.xilinx.com [172.16.1.203]) by tsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id u160qGAn024355; Fri, 5 Feb 2016 16:52:16 -0800 Received: from [172.19.74.182] (port=49746 helo=xsjalistai50.xlnx.xilinx.com) by xsj-tvapsmtp02 with esmtp (Exim 4.63) (envelope-from ) id 1aRrCE-0002HF-QW; Fri, 05 Feb 2016 16:57:54 -0800 From: Alistair Francis To: Date: Fri, 5 Feb 2016 16:55:16 -0800 Message-ID: <9a4369604c653bd21eca8509aa8b160d8cda951f.1454720020.git.alistair.francis@xilinx.com> X-Mailer: git-send-email 2.5.0 In-Reply-To: References: X-RCIS-Action: ALLOW X-TM-AS-MML: disable X-TM-AS-Product-Ver: IMSS-7.1.0.1679-8.0.0.1202-22054.006 X-TM-AS-Result: No--5.433-7.0-31-10 X-imss-scan-details: No--5.433-7.0-31-10 X-TMASE-MatchedRID: v+KG/vpWPix+LUH9gBIjGBcanaCAqviGTJDl9FKHbrkKogmGusPLbyqm qr0mj9F3ICB31/j/NWCAMuqetGVetnyef22ep6XYOwBXM346/+xda8QlAkOKWZmkfrtTVIeNOYr LnLevf/3jTTZh8VM9reNolNORpl3c X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.96; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(2980300002)(1110001)(1109001)(339900001)(189002)(199003)(36756003)(4326007)(106466001)(189998001)(5001960100002)(110136002)(47776003)(33646002)(2950100001)(64026002)(5003600100002)(71366001)(118296001)(77096005)(50226001)(87936001)(50466002)(11100500001)(1096002)(586003)(50986999)(86362001)(575784001)(76176999)(48376002)(92566002)(5003940100001)(229853001)(2906002)(2351001)(105606002)(19580395003)(6806005)(19580405001)(5008740100001)(85426001)(1220700001)(107986001); DIR:OUT; SFP:1101; SCL:1; SRVR:BL2NAM02HT040; H:xsj-tvapsmtpgw01; FPR:; SPF:Fail; MLV:sfv; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-MS-Office365-Filtering-Correlation-Id: 934053a9-bfae-4aec-fac8-08d32e908d1f X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BL2NAM02HT040; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(192813158149592); X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(2401047)(13023025)(13018025)(13024025)(8121501046)(13017025)(13015025)(5005006)(3002001)(10201501046); SRVR:BL2NAM02HT040; BCL:0; PCL:0; RULEID:; SRVR:BL2NAM02HT040; X-Forefront-PRVS: 08444C7C87 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Feb 2016 00:57:56.4723 (UTC) X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c; Ip=[149.199.60.96]; Helo=[xsj-tvapsmtpgw01] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL2NAM02HT040 X-detected-operating-system: by eggs.gnu.org: Windows 7 or 8 [fuzzy] X-Received-From: 104.47.37.66 Cc: peter.maydell@linaro.org, alindsay@codeaurora.org, alistair.francis@xilinx.com, crosthwaitepeter@gmail.com, cov@codeaurora.org, nathan@nathanrossi.com Subject: [Qemu-devel] [PATCH v2 1/5] target-arm: Add the pmceid0 and pmceid1 registers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Aaron Lindsay Signed-off-by: Alistair Francis Tested-by: Nathan Rossi --- target-arm/cpu-qom.h | 2 ++ target-arm/cpu.c | 2 ++ target-arm/cpu64.c | 2 ++ target-arm/helper.c | 8 ++++++++ 4 files changed, 14 insertions(+) diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h index 07c0a71..1cc4502 100644 --- a/target-arm/cpu-qom.h +++ b/target-arm/cpu-qom.h @@ -148,6 +148,8 @@ typedef struct ARMCPU { uint32_t id_pfr0; uint32_t id_pfr1; uint32_t id_dfr0; + uint32_t pmceid0; + uint32_t pmceid1; uint32_t id_afr0; uint32_t id_mmfr0; uint32_t id_mmfr1; diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 7ddbf3d..937f845 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -1156,6 +1156,8 @@ static void cortex_a15_initfn(Object *obj) cpu->id_pfr0 = 0x00001131; cpu->id_pfr1 = 0x00011011; cpu->id_dfr0 = 0x02010555; + cpu->pmceid0 = 0x00000481; /* PMUv3 events 0x0, 0x8, and 0x11 */ + cpu->pmceid1 = 0x00000000; cpu->id_afr0 = 0x00000000; cpu->id_mmfr0 = 0x10201105; cpu->id_mmfr1 = 0x20000000; diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c index c847513..8c4b6fd 100644 --- a/target-arm/cpu64.c +++ b/target-arm/cpu64.c @@ -134,6 +134,8 @@ static void aarch64_a57_initfn(Object *obj) cpu->id_isar5 = 0x00011121; cpu->id_aa64pfr0 = 0x00002222; cpu->id_aa64dfr0 = 0x10305106; + cpu->pmceid0 = 0x00000481; /* PMUv3 events 0x0, 0x8, and 0x11 */ + cpu->pmceid1 = 0x00000000; cpu->id_aa64isar0 = 0x00011120; cpu->id_aa64mmfr0 = 0x00001124; cpu->dbgdidr = 0x3516d000; diff --git a/target-arm/helper.c b/target-arm/helper.c index 5ea507f..66aa406 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -4192,6 +4192,14 @@ void register_cp_regs_for_features(ARMCPU *cpu) .opc0 = 3, .opc1 = 0, .crn = 0, .crm = 5, .opc2 = 1, .access = PL1_R, .type = ARM_CP_CONST, .resetvalue = cpu->id_aa64dfr1 }, + { .name = "PMCEID0_EL0", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 3, .crn = 9, .crm = 12, .opc2 = 6, + .access = PL1_R, .type = ARM_CP_CONST, + .resetvalue = cpu->pmceid0}, + { .name = "PMCEID1_EL0", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 3, .crn = 9, .crm = 12, .opc2 = 7, + .access = PL1_R, .type = ARM_CP_CONST, + .resetvalue = cpu->pmceid1}, { .name = "ID_AA64AFR0_EL1", .state = ARM_CP_STATE_AA64, .opc0 = 3, .opc1 = 0, .crn = 0, .crm = 5, .opc2 = 4, .access = PL1_R, .type = ARM_CP_CONST,