diff mbox

[v12,24/36] cpu: Convert CpuInfo into flat union

Message ID CAAG0J9-LPyiDun5M+ywa30KcEqrxR8XZzz7_vUdc_EDJU8VT0A@mail.gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

James Hogan Feb. 2, 2016, 12:25 p.m. UTC
Hi Eric,

On 18 November 2015 at 08:52, Eric Blake <eblake@redhat.com> wrote:
> +# An enumeration of cpu types that enable additional information during
> +# @query-cpus.
> +#
> +# Since: 2.6
> +##
> +{ 'enum': 'CpuInfoArch',
> +  'data': ['x86', 'sparc', 'ppc', 'mips', 'tricore', 'other' ] }
> +

...

> +##
> +# @CpuInfo:
> +#
> +# Information about a virtual CPU
> +#
> +# Since: 0.14.0
> +##
> +{ 'union': 'CpuInfo', 'base': 'CpuInfoBase', 'discriminator': 'arch',
> +  'data': { 'x86': 'CpuInfoX86',
> +            'sparc': 'CpuInfoSparc',
> +            'ppc': 'CpuInfoPpc',
> +            'mips': 'CpuInfoMips',

This is causing compilation issues on MIPS, because gcc bizarrely
defines mips=1:

$ mips-img-linux-gnu-gcc -dM -E - </dev/null | grep '\bmips\b'
#define mips 1

For example:
 CC    qga/commands.o
In file included from /work/mips/qemu/msa/include/qapi/qmp/qobject.h:37:0,
                from /work/mips/qemu/msa/include/qapi/qmp/dispatch.h:17,
                from ./qga/guest-agent-core.h:13,
                from qga/commands.c:14:
./qapi-types.h:2568:22: error: expected identifier or ‘(’ before
numeric constant
        CpuInfoMIPS *mips;
                     ^
/work/mips/qemu/msa/rules.mak:57: recipe for target 'qga/commands.o' failed
make: *** [qga/commands.o] Error 1


Any suggestions for a fix that is less ugly than this:

Cheers
James

Comments

Markus Armbruster Feb. 2, 2016, 1:49 p.m. UTC | #1
James Hogan <james.hogan@imgtec.com> writes:

> Hi Eric,
>
> On 18 November 2015 at 08:52, Eric Blake <eblake@redhat.com> wrote:
>> +# An enumeration of cpu types that enable additional information during
>> +# @query-cpus.
>> +#
>> +# Since: 2.6
>> +##
>> +{ 'enum': 'CpuInfoArch',
>> +  'data': ['x86', 'sparc', 'ppc', 'mips', 'tricore', 'other' ] }
>> +
>
> ...
>
>> +##
>> +# @CpuInfo:
>> +#
>> +# Information about a virtual CPU
>> +#
>> +# Since: 0.14.0
>> +##
>> +{ 'union': 'CpuInfo', 'base': 'CpuInfoBase', 'discriminator': 'arch',
>> +  'data': { 'x86': 'CpuInfoX86',
>> +            'sparc': 'CpuInfoSparc',
>> +            'ppc': 'CpuInfoPpc',
>> +            'mips': 'CpuInfoMips',
>
> This is causing compilation issues on MIPS, because gcc bizarrely
> defines mips=1:
>
> $ mips-img-linux-gnu-gcc -dM -E - </dev/null | grep '\bmips\b'
> #define mips 1

Bizarre indeed.

See also
https://gcc.gnu.org/onlinedocs/gcc-5.3.0/cpp/System-specific-Predefined-Macros.html#System-specific-Predefined-Macros

> For example:
>  CC    qga/commands.o
> In file included from /work/mips/qemu/msa/include/qapi/qmp/qobject.h:37:0,
>                 from /work/mips/qemu/msa/include/qapi/qmp/dispatch.h:17,
>                 from ./qga/guest-agent-core.h:13,
>                 from qga/commands.c:14:
> ./qapi-types.h:2568:22: error: expected identifier or ‘(’ before
> numeric constant
>         CpuInfoMIPS *mips;
>                      ^
> /work/mips/qemu/msa/rules.mak:57: recipe for target 'qga/commands.o' failed
> make: *** [qga/commands.o] Error 1
>
>
> Any suggestions for a fix that is less ugly than this:

#undef mips with a suitable comment?

[...]
Eric Blake Feb. 2, 2016, 2:49 p.m. UTC | #2
On 02/02/2016 05:25 AM, James Hogan wrote:
> Hi Eric,
> 
> On 18 November 2015 at 08:52, Eric Blake <eblake@redhat.com> wrote:
>> +# An enumeration of cpu types that enable additional information during
>> +# @query-cpus.
>> +#
>> +# Since: 2.6
>> +##
>> +{ 'enum': 'CpuInfoArch',
>> +  'data': ['x86', 'sparc', 'ppc', 'mips', 'tricore', 'other' ] }
>> +

> 
> This is causing compilation issues on MIPS, because gcc bizarrely
> defines mips=1:
> 
> $ mips-img-linux-gnu-gcc -dM -E - </dev/null | grep '\bmips\b'
> #define mips 1

Not the first instance of namespace pollution.


> Any suggestions for a fix that is less ugly than this:

Yes, I'm posting the proper patch to poison QAPI 'mips' into C 'q_mips'
shortly.  That way, QMP remains backwards compatible (your approach did
not preserve that).
diff mbox

Patch

diff --git a/cpus.c b/cpus.c
index 882b61851a44..395ec70bdf22 100644
--- a/cpus.c
+++ b/cpus.c
@@ -1580,9 +1580,9 @@  CpuInfoList *qmp_query_cpus(Error **errp)
        info->value->u.sparc->pc = env->pc;
        info->value->u.sparc->npc = env->npc;
#elif defined(TARGET_MIPS)
-        info->value->arch = CPU_INFO_ARCH_MIPS;
-        info->value->u.mips = g_new0(CpuInfoMIPS, 1);
-        info->value->u.mips->PC = env->active_tc.PC;
+        info->value->arch = CPU_INFO_ARCH_MIPSARCH;
+        info->value->u.mipsarch = g_new0(CpuInfoMIPS, 1);
+        info->value->u.mipsarch->PC = env->active_tc.PC;
#elif defined(TARGET_TRICORE)
        info->value->arch = CPU_INFO_ARCH_TRICORE;
        info->value->u.tricore = g_new0(CpuInfoTricore, 1);
diff --git a/hmp.c b/hmp.c
index 54f2620690b1..e4cba874352e 100644
--- a/hmp.c
+++ b/hmp.c
@@ -321,8 +321,8 @@  void hmp_info_cpus(Monitor *mon, const QDict *qdict)
            monitor_printf(mon, " pc=0x%016" PRIx64, cpu->value->u.sparc->pc);
            monitor_printf(mon, " npc=0x%016" PRIx64, cpu->value->u.sparc->npc);
            break;
-        case CPU_INFO_ARCH_MIPS:
-            monitor_printf(mon, " PC=0x%016" PRIx64, cpu->value->u.mips->PC);
+        case CPU_INFO_ARCH_MIPSARCH:
+            monitor_printf(mon, " PC=0x%016" PRIx64,
cpu->value->u.mipsarch->PC);
            break;
        case CPU_INFO_ARCH_TRICORE:
            monitor_printf(mon, " PC=0x%016" PRIx64, cpu->value->u.tricore->PC);
diff --git a/qapi-schema.json b/qapi-schema.json
index 8d04897922ec..c72e0615e074 100644
--- a/qapi-schema.json
+++ b/qapi-schema.json
@@ -750,7 +750,7 @@ 
# Since: 2.6
##
{ 'enum': 'CpuInfoArch',
-  'data': ['x86', 'sparc', 'ppc', 'mips', 'tricore', 'other' ] }
+  'data': ['x86', 'sparc', 'ppc', 'mipsarch', 'tricore', 'other' ] }

##
# @CpuInfoBase:
@@ -791,7 +791,7 @@ 
  'data': { 'x86': 'CpuInfoX86',
            'sparc': 'CpuInfoSPARC',
            'ppc': 'CpuInfoPPC',
-            'mips': 'CpuInfoMIPS',
+            'mipsarch': 'CpuInfoMIPS',
            'tricore': 'CpuInfoTricore',
            'other': 'CpuInfoOther' } }