From patchwork Fri Oct 7 16:10:19 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alistair Francis X-Patchwork-Id: 9366523 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0C6046075E for ; Fri, 7 Oct 2016 16:11:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F1DA82974B for ; Fri, 7 Oct 2016 16:11:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E637B29752; Fri, 7 Oct 2016 16:11:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 74DF42974B for ; Fri, 7 Oct 2016 16:11:17 +0000 (UTC) Received: from localhost ([::1]:37118 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bsXjw-0003i0-RV for patchwork-qemu-devel@patchwork.kernel.org; Fri, 07 Oct 2016 12:11:16 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51662) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bsXjY-0003g8-FM for qemu-devel@nongnu.org; Fri, 07 Oct 2016 12:10:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bsXjW-0008Hq-9v for qemu-devel@nongnu.org; Fri, 07 Oct 2016 12:10:51 -0400 Received: from mail-oi0-x244.google.com ([2607:f8b0:4003:c06::244]:34509) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bsXjW-0008HL-4a for qemu-devel@nongnu.org; Fri, 07 Oct 2016 12:10:50 -0400 Received: by mail-oi0-x244.google.com with SMTP id r132so3654003oig.1 for ; Fri, 07 Oct 2016 09:10:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=qyIOwqacIkWlDoNRhs3zlJN7vPbjJ8Q+37oVI0Hp0rg=; b=l5MRdJwKeQKkgzRNQbrq4ptUTgbUgL8JU15WCPADwz2qj9bvUl4jaRuX2EQbPVINNM p5QomtrplwmAxWLdKQopdGFYaQuojpSPpjDDM3D9o/J6NrMQtJO3qasFM2jUCAfBEvrD lFcCILVdkPr27tqhQZeFvzQQXpda4nxVxs5YrasPRcacXJJKKaZple1gincJySHoM6qK xerUhk4TvDrBEnRX938Xrth8b8ZWMXf+ajEb5ZVKehNPadcVWGmL+U9xDVpJt3iiyCgM mTIZSJdT/lDDrh4sHJ1mig57x2WGuOM+UwTqp6TGNxg6HPWXMxT8+CqL3UrevUkz4OFU 0xvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=qyIOwqacIkWlDoNRhs3zlJN7vPbjJ8Q+37oVI0Hp0rg=; b=ejQs5wnyDm5LqGsvnKQtZIzV/GenTZtEX0oN9gTSlNVmZT38Br6nznibgDNkF0cqZO PicdwdRnIFa8iaq0Eo70t73wyFxs93h1xQddYsOLjjIZItDN3q41Cf8WmEcuvNUC8h/c S8YSwy2NgPURy/YXS07kkJb9EScU/WnsH62UPxa1HgNx9Blc/bqbwVinC42ZOkYc76sY ehe5g6a5GJo2r+nl/ucPd+MY9RxdclrQDgf3iERQk+io17+T/TTKC+hrL5CI4qVbldP+ 27OqkkUA8U4kmGHRpqKiX4vsOocQivatVqbM6HEVPUtyBh+QwQw0ZHUFMmleL6KyFcbX P8SQ== X-Gm-Message-State: AA6/9Rnbs2xbxRp3WH/istLHy29B/NQZDN43qlYtE/n9J36Qm/rYWFbcaUJPuXyqemDZqDME89Kd87Pcgf/isg== X-Received: by 10.157.9.209 with SMTP id 17mr12376554otz.87.1475856649713; Fri, 07 Oct 2016 09:10:49 -0700 (PDT) MIME-Version: 1.0 Received: by 10.182.181.7 with HTTP; Fri, 7 Oct 2016 09:10:19 -0700 (PDT) In-Reply-To: References: <20161005185604.6432.79423.malonedeb@chaenomeles.canonical.com> From: Alistair Francis Date: Fri, 7 Oct 2016 09:10:19 -0700 Message-ID: To: Seth K X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2607:f8b0:4003:c06::244 Subject: Re: [Qemu-devel] [Bug 1630723] [NEW] UART writes to netduino2/stm32f205-soc disappear X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bug 1630723 <1630723@bugs.launchpad.net>, "qemu-devel@nongnu.org Developers" Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP On Fri, Oct 7, 2016 at 9:03 AM, Alistair Francis wrote: > On Fri, Oct 7, 2016 at 8:59 AM, Seth K wrote: >> The only machine I saw listed in the help output is "netduino2." I pulled >> QEMU from github, was that the right thing to do? >> >> I found the specifications for the stm32f2xx and some similar chips and >> verified the addresses and interrupts are correct. > > Sorry my mistake. It is a the Netduino 2 Plus that we don't support. > > I think we should move this conversation to the bug report as well, I > was hoping that replying to the email would update the bug report but > it doesn't look like it. > >> >> The stm32f205 should support 6 UARTs, and the 6 addresses and IRQs are coded >> correctly. However there is a hard-coded value MAX_SERIAL_PORTS limiting >> serial_hds to 4, and I don't know why. I am considering submitting a patch. > > I'm not sure why we have that limit, you can submit a patch and see > what everyone says. > >> >> If I increase MAX_SERIAL_PORTS I can write to UARTs 1, 4, 5, and 6 and >> output them to sockets. However writes to UARTs 2 and 3 just disappear. They >> don't even trigger my printf in stm32f2xx_usart_write. It seems like they >> are being intercepted somewhere, and unfortunately my knowledge of QEMU is >> too low to know where to look. Any pointers would be greatly appreciated. > > Strange. There could be something else addressed there. If you run > 'info mtree' at the QEMU prompt (Ctrl-a + c) you should be able to see > the memory map of the system. Hey Seth, What if you try this diff? Does that help? Thanks, Alistair diff --git a/hw/char/stm32f2xx_usart.c b/hw/char/stm32f2xx_usart.c index 4c6640d..b07c67b 100644 --- a/hw/char/stm32f2xx_usart.c +++ b/hw/char/stm32f2xx_usart.c @@ -204,7 +204,7 @@ static void stm32f2xx_usart_init(Object *obj) sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq); memory_region_init_io(&s->mmio, obj, &stm32f2xx_usart_ops, s, - TYPE_STM32F2XX_USART, 0x2000); + TYPE_STM32F2XX_USART, 0x200); sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); }