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Thu, 19 Dec 2024 03:53:54 +0000 From: andrew Yuan To: "philmd@linaro.org" , "edgar.iglesias@gmail.com" , "alistair@alistair23.me" , "jasowang@redhat.com" , "peter.maydell@linaro.org" , "qemu-arm@nongnu.org" , "qemu-devel@nongnu.org" Subject: =?utf-8?q?=E7=AD=94=E5=A4=8D=3A_=5BPATCH_v2=5D_hw/net=3A_cadence=5F?= =?utf-8?q?gem=3A_feat=3A_add_logic_for_the_DISABLE=5FMASK_bit_in_type2=5Fco?= =?utf-8?q?mpare=5Fx=5Fword=5F1?= Thread-Topic: [PATCH v2] hw/net: cadence_gem: feat: add logic for the DISABLE_MASK bit in type2_compare_x_word_1 Thread-Index: AQHbUcg3/1u76TWO1kOYcgQ8V7PmPbLs7yhQ Date: Thu, 19 Dec 2024 03:53:53 +0000 Message-ID: References: <20241219034304.747-1-andrew.yuan@jaguarmicro.com> In-Reply-To: <20241219034304.747-1-andrew.yuan@jaguarmicro.com> Accept-Language: en-US Content-Language: zh-CN X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=jaguarmicro.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: KL1PR0601MB4891:EE_|PUZPR06MB6145:EE_ x-ms-office365-filtering-correlation-id: cda1ab69-1df1-442b-4ab9-08dd1fe0c1bc x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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I sent an incorrect patch. -----邮件原件----- 发件人: andrew Yuan 发送时间: 2024年12月19日 11:43 收件人: philmd@linaro.org; edgar.iglesias@gmail.com; alistair@alistair23.me; jasowang@redhat.com; peter.maydell@linaro.org; qemu-arm@nongnu.org; qemu-devel@nongnu.org 抄送: andrew Yuan 主题: [PATCH v2] hw/net: cadence_gem: feat: add logic for the DISABLE_MASK bit in type2_compare_x_word_1 From: Andrew Yuan As in the Cadence IP for Gigabit Ethernet MAC Part Number: IP7014 IP Rev: R1p12 - Doc Rev: 1.3 User Guide, if the DISABLE_MASK bit in type2_compare_x_word_1 is set, mask_value in type2_compare_x_word_0 is used as an additional 2 byte Compare Value Signed-off-by: Andrew Yuan Suggested-by: Philippe Mathieu-Daudé --- hw/net/cadence_gem.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) -- 2.25.1 diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index 3fce01315f..897331c5ef 100644 --- a/hw/net/cadence_gem.c +++ b/hw/net/cadence_gem.c @@ -909,8 +909,8 @@ static int get_queue_from_screen(CadenceGEMState *s, uint8_t *rxbuf_ptr, /* Compare A, B, C */ for (j = 0; j < 3; j++) { - uint32_t cr0, cr1, mask, compare; - uint16_t rx_cmp; + uint32_t cr0, cr1, mask, compare, disable_mask; + uint32_t rx_cmp; int offset; int cr_idx = extract32(reg, R_SCREENING_TYPE2_REG0_COMPARE_A_SHIFT + j * 6, R_SCREENING_TYPE2_REG0_COMPARE_A_LENGTH); @@ -946,9 +946,23 @@ static int get_queue_from_screen(CadenceGEMState *s, uint8_t *rxbuf_ptr, break; } - rx_cmp = rxbuf_ptr[offset] << 8 | rxbuf_ptr[offset]; - mask = FIELD_EX32(cr0, TYPE2_COMPARE_0_WORD_0, MASK_VALUE); - compare = FIELD_EX32(cr0, TYPE2_COMPARE_0_WORD_0, COMPARE_VALUE); + disable_mask = + FIELD_EX32(cr1, TYPE2_COMPARE_0_WORD_1, DISABLE_MASK); + if (disable_mask) { + /* + * If disable_mask is set, + * mask_value is used as an additional 2 byte Compare Value. + * To simple, set mask = 0xFFFFFFFF, if disable_mask is set. + */ + rx_cmp = ldl_le_p(rxbuf_ptr[offset]); + mask = 0xFFFFFFFF; + compare = cr0; + } else { + rx_cmp = lduw_le_p(rxbuf_ptr[offset]); + mask = FIELD_EX32(cr0, TYPE2_COMPARE_0_WORD_0, MASK_VALUE); + compare = + FIELD_EX32(cr0, TYPE2_COMPARE_0_WORD_0, COMPARE_VALUE); + } if ((rx_cmp & mask) == (compare & mask)) { matched = true;