| Message ID | VI1PR10MB204723BF7D62501F0339242A810B0@VI1PR10MB2047.EURPRD10.PROD.OUTLOOK.COM (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/arm: Fix broken VQADD and VQSUB causing abort | expand |
On Fri, 17 May 2019 at 17:04, Torbjorn SVENSSON <torbjorn.svensson@st.com> wrote: > > In commit 89e68b575e138d0af1435f11a8ffcd8779c237bd, the handling of > VQADD and VQSUB was changed for Cortex-A and the new handling does > not return properly after calling tcg_gen_gvec_4(), thus the code > after is executed and that does not know about the VQADD or VQSUB > instructions and calls abort. > > Detected running GCC testsuite for Cortex-A7 and executing the tests > in QEMU using Cortex-A15 since Cortex-A7 and Cortex-A15 have similar > instruction set. > > Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@st.com> Hi Torbjorn; thanks for this patch. As it happens there's already a fix for this on list: https://patchwork.ozlabs.org/patch/1100645/ so it should get into git master some time next week. thanks -- PMM
Hi Peter, Thanks for the fast response! Great to hear that a patch for the issue is on its way into master. Kind regards, Torbjörn -----Original Message----- From: Peter Maydell <peter.maydell@linaro.org> Sent: den 17 maj 2019 18:24 To: Torbjorn SVENSSON <torbjorn.svensson@st.com> Cc: qemu-arm@nongnu.org; Samuel HULTGREN <samuel.hultgren@st.com>; qemu-devel@nongnu.org Subject: Re: [Qemu-arm] [PATCH] target/arm: Fix broken VQADD and VQSUB causing abort On Fri, 17 May 2019 at 17:04, Torbjorn SVENSSON <torbjorn.svensson@st.com> wrote: > > In commit 89e68b575e138d0af1435f11a8ffcd8779c237bd, the handling of > VQADD and VQSUB was changed for Cortex-A and the new handling does not > return properly after calling tcg_gen_gvec_4(), thus the code after is > executed and that does not know about the VQADD or VQSUB instructions > and calls abort. > > Detected running GCC testsuite for Cortex-A7 and executing the tests > in QEMU using Cortex-A15 since Cortex-A7 and Cortex-A15 have similar > instruction set. > > Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@st.com> Hi Torbjorn; thanks for this patch. As it happens there's already a fix for this on list: https://patchwork.ozlabs.org/patch/1100645/ so it should get into git master some time next week. thanks -- PMM
diff --git a/target/arm/translate.c b/target/arm/translate.c index dd053c80d6..298c262825 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -6598,13 +6598,13 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc), rn_ofs, rm_ofs, vec_size, vec_size, (u ? uqadd_op : sqadd_op) + size); - break; + return 0; case NEON_3R_VQSUB: tcg_gen_gvec_4(rd_ofs, offsetof(CPUARMState, vfp.qc), rn_ofs, rm_ofs, vec_size, vec_size, (u ? uqsub_op : sqsub_op) + size); - break; + return 0; case NEON_3R_VMUL: /* VMUL */ if (u) {
In commit 89e68b575e138d0af1435f11a8ffcd8779c237bd, the handling of VQADD and VQSUB was changed for Cortex-A and the new handling does not return properly after calling tcg_gen_gvec_4(), thus the code after is executed and that does not know about the VQADD or VQSUB instructions and calls abort. Detected running GCC testsuite for Cortex-A7 and executing the tests in QEMU using Cortex-A15 since Cortex-A7 and Cortex-A15 have similar instruction set. Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@st.com> --- target/arm/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)