diff mbox series

Arm: VFP regression

Message ID YFZ5YgPWLraY5v3o@os.inf.tu-dresden.de (mailing list archive)
State New, archived
Headers show
Series Arm: VFP regression | expand

Commit Message

Adam Lackorzynski March 20, 2021, 10:38 p.m. UTC 
Hi,

I'm seeing a regression in Arm's vfp handling, giving an undefined
instruction when reading mvfr1 in PL2/armv7 although the FPU is enabled.
The following makes it work again for me, however this just looks like a
band-aid. Thanks for taking a look.

Adam

Comments

no-reply@patchew.org March 20, 2021, 10:42 p.m. UTC | #1 
Patchew URL: https://patchew.org/QEMU/YFZ5YgPWLraY5v3o@os.inf.tu-dresden.de/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: YFZ5YgPWLraY5v3o@os.inf.tu-dresden.de
Subject: Arm: VFP regression

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]         patchew/YFZ5YgPWLraY5v3o@os.inf.tu-dresden.de -> patchew/YFZ5YgPWLraY5v3o@os.inf.tu-dresden.de
Switched to a new branch 'test'
a20b750 Arm: VFP regression

=== OUTPUT BEGIN ===
ERROR: Missing Signed-off-by: line(s)

total: 1 errors, 0 warnings, 8 lines checked

Commit a20b7502228d (Arm: VFP regression) has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/YFZ5YgPWLraY5v3o@os.inf.tu-dresden.de/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
Peter Maydell March 21, 2021, 12:56 p.m. UTC | #2 
On Sat, 20 Mar 2021 at 22:38, Adam Lackorzynski <adam@l4re.org> wrote:
>
> Hi,
>
> I'm seeing a regression in Arm's vfp handling, giving an undefined
> instruction when reading mvfr1 in PL2/armv7 although the FPU is enabled.
> The following makes it work again for me, however this just looks like a
> band-aid. Thanks for taking a look.

Could you provide a test case, please (QEMU command line and
image/etc files needed to reproduce) ?

thanks
-- PMM
Adam Lackorzynski March 22, 2021, 5:09 p.m. UTC | #3 
Hi,

On Sun Mar 21, 2021 at 12:56:12 +0000, Peter Maydell wrote:
> On Sat, 20 Mar 2021 at 22:38, Adam Lackorzynski <adam@l4re.org> wrote:
> >
> > Hi,
> >
> > I'm seeing a regression in Arm's vfp handling, giving an undefined
> > instruction when reading mvfr1 in PL2/armv7 although the FPU is enabled.
> > The following makes it work again for me, however this just looks like a
> > band-aid. Thanks for taking a look.
> 
> Could you provide a test case, please (QEMU command line and
> image/etc files needed to reproduce) ?

Turns out I was missing one path in my code wrt FPU state and due to
unfortunate and unforeseen timing I was hitting this case. Apologies and
sorry for the noise.


Thanks,
Adam
diff mbox series

Patch

diff --git a/target/arm/translate-vfp.c.inc b/target/arm/translate-vfp.c.inc
index 10766f210c..37c079fab1 100644
--- a/target/arm/translate-vfp.c.inc
+++ b/target/arm/translate-vfp.c.inc
@@ -120,7 +120,7 @@  static void gen_preserve_fp_state(DisasContext *s)
  */
 static bool full_vfp_access_check(DisasContext *s, bool ignore_vfp_enabled)
 {
-    if (s->fp_excp_el) {
+    if (s->fp_excp_el && !ignore_vfp_enabled) {
         /* M-profile handled this earlier, in disas_m_nocp() */
         assert (!arm_dc_feature(s, ARM_FEATURE_M));
         gen_exception_insn(s, s->pc_curr, EXCP_UDEF,