| Message ID | a3c8d7e38550c3d5a46e6fa94ffadfa625a4861d.1721731723.git.mst@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [PULL,v2,01/61] hw/virtio/virtio-crypto: Fix op_code assignment in virtio_crypto_create_asym_session | expand |
23.07.2024 13:56, Michael S. Tsirkin wrote: > From: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com> > > The constant must be unsigned, otherwise the two's complement > overrides the other fields when a PASID is present. > > Fixes: 1b2b12376c8a ("intel-iommu: PASID support") > Signed-off-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com> > Reviewed-by: Yi Liu <yi.l.liu@intel.com> > Reviewed-by: Zhenzhong Duan <zhenzhong.duan@intel.com> > Reviewed-by: Minwoo Im <minwoo.im@samsung.com> > Message-Id: <20240709142557.317271-2-clement.mathieu--drif@eviden.com> > Reviewed-by: Michael S. Tsirkin <mst@redhat.com> > Signed-off-by: Michael S. Tsirkin <mst@redhat.com> > --- > hw/i386/intel_iommu_internal.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h > index f8cf99bddf..cbc4030031 100644 > --- a/hw/i386/intel_iommu_internal.h > +++ b/hw/i386/intel_iommu_internal.h > @@ -267,7 +267,7 @@ > /* For the low 64-bit of 128-bit */ > #define VTD_FRCD_FI(val) ((val) & ~0xfffULL) > #define VTD_FRCD_PV(val) (((val) & 0xffffULL) << 40) > -#define VTD_FRCD_PP(val) (((val) & 0x1) << 31) > +#define VTD_FRCD_PP(val) (((val) & 0x1ULL) << 31) > #define VTD_FRCD_IR_IDX(val) (((val) & 0xffffULL) << 48) Is this qemu-stable material? (for 7.2 and 9.0) /mjt
diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index f8cf99bddf..cbc4030031 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -267,7 +267,7 @@ /* For the low 64-bit of 128-bit */ #define VTD_FRCD_FI(val) ((val) & ~0xfffULL) #define VTD_FRCD_PV(val) (((val) & 0xffffULL) << 40) -#define VTD_FRCD_PP(val) (((val) & 0x1) << 31) +#define VTD_FRCD_PP(val) (((val) & 0x1ULL) << 31) #define VTD_FRCD_IR_IDX(val) (((val) & 0xffffULL) << 48) /* DMA Remapping Fault Conditions */