From patchwork Wed Dec 26 08:25:20 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Yang, Weijiang" X-Patchwork-Id: 10742927 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 102C8924 for ; Wed, 26 Dec 2018 08:25:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 013D5283E7 for ; Wed, 26 Dec 2018 08:25:27 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E9A0B28957; Wed, 26 Dec 2018 08:25:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9C6A1283E7 for ; Wed, 26 Dec 2018 08:25:26 +0000 (UTC) Received: from localhost ([127.0.0.1]:44879 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gc4VJ-0001fb-RI for patchwork-qemu-devel@patchwork.kernel.org; Wed, 26 Dec 2018 03:25:25 -0500 Received: from eggs.gnu.org ([208.118.235.92]:50689) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gc4RL-0005nO-3V for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gc4RJ-0005rz-5j for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:19 -0500 Received: from mga06.intel.com ([134.134.136.31]:14744) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gc4RH-0005p1-9t for qemu-devel@nongnu.org; Wed, 26 Dec 2018 03:21:17 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Dec 2018 00:21:14 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,400,1539673200"; d="scan'208";a="103379595" Received: from unknown (HELO localhost.localdomain.sh.intel.com) ([10.239.13.104]) by orsmga006.jf.intel.com with ESMTP; 26 Dec 2018 00:21:12 -0800 From: Yang Weijiang To: qemu-devel@nongnu.org, pbonzini@redhat.com, rkrcmar@redhat.com, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, mst@redhat.com, yu-cheng.yu@intel.com, yi.z.zhang@intel.com, hjl.tools@gmail.com Date: Wed, 26 Dec 2018 16:25:20 +0800 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH 4/4] Report CPUID xsave area support for CET. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yang Weijiang , Zhang Yi Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP CPUID bit definition as below: CPUID.(EAX=d, ECX=1):ECX.CET_U(bit 11): user mode state CPUID.(EAX=d, ECX=1):ECX.CET_S(bit 12): kernel mode state Signed-off-by: Zhang Yi Signed-off-by: Yang Weijiang --- target/i386/cpu.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index cf4f2798dc..78994bfa1d 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4396,12 +4396,22 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, *ebx = xsave_area_size(env->xcr0); } else if (count == 1) { *eax = env->features[FEAT_XSAVE]; + *ecx = env->features[FEAT_XSAVE_SV_LO]; + *edx = env->features[FEAT_XSAVE_SV_HI]; + *ebx = xsave_area_size_compat(x86_cpu_xsave_components(cpu) | + x86_cpu_xsave_sv_components(cpu)); } else if (count < ARRAY_SIZE(x86_ext_save_areas)) { if ((x86_cpu_xsave_components(cpu) >> count) & 1) { const ExtSaveArea *esa = &x86_ext_save_areas[count]; *eax = esa->size; *ebx = esa->offset; } + if ((x86_cpu_xsave_sv_components(cpu) >> count) & 1) { + const ExtSaveArea *esa_sv = &x86_ext_save_areas[count]; + *eax = esa_sv->size; + *ebx = esa_sv->offset; + *ecx = 1; + } } break; }