| Message ID | c382376352a67eda8e899e152ee88f677138a95f.1709045654.git.balaton@eik.bme.hu (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Misc clean ups to target/ppc exception handling | expand |
On Wed Feb 28, 2024 at 1:08 AM AEST, BALATON Zoltan wrote: > Most exceptions are raised with nip pointing to the faulting > instruction but the sc instruction generating a syscall exception > leaves nip pointing to next instruction. Fix gen_sc to not use > gen_exception_err() which sets nip back but correctly set nip to > pc_next so we don't have to patch this in the exception handlers. > > Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Nicholas Piggin <npiggin@gmail.com> > --- > target/ppc/excp_helper.c | 43 ++-------------------------------------- > target/ppc/translate.c | 6 ++---- > 2 files changed, 4 insertions(+), 45 deletions(-) > > diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c > index fba6e03d18..f1e62d9878 100644 > --- a/target/ppc/excp_helper.c > +++ b/target/ppc/excp_helper.c > @@ -116,7 +116,7 @@ static void dump_syscall(CPUPPCState *env) > ppc_dump_gpr(env, 0), ppc_dump_gpr(env, 3), > ppc_dump_gpr(env, 4), ppc_dump_gpr(env, 5), > ppc_dump_gpr(env, 6), ppc_dump_gpr(env, 7), > - ppc_dump_gpr(env, 8), env->nip); > + ppc_dump_gpr(env, 8), env->nip - 4); > } > > static void dump_hcall(CPUPPCState *env) > @@ -131,7 +131,7 @@ static void dump_hcall(CPUPPCState *env) > ppc_dump_gpr(env, 7), ppc_dump_gpr(env, 8), > ppc_dump_gpr(env, 9), ppc_dump_gpr(env, 10), > ppc_dump_gpr(env, 11), ppc_dump_gpr(env, 12), > - env->nip); > + env->nip - 4); > } > > #ifdef CONFIG_TCG > @@ -516,12 +516,6 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp) > break; > case POWERPC_EXCP_SYSCALL: /* System call exception */ > dump_syscall(env); > - > - /* > - * We need to correct the NIP which in this case is supposed > - * to point to the next instruction > - */ > - env->nip += 4; > break; > case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */ > trace_ppc_excp_print("FIT"); > @@ -632,12 +626,6 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp) > break; > case POWERPC_EXCP_SYSCALL: /* System call exception */ > dump_syscall(env); > - > - /* > - * We need to correct the NIP which in this case is supposed > - * to point to the next instruction > - */ > - env->nip += 4; > break; > case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */ > case POWERPC_EXCP_DECR: /* Decrementer exception */ > @@ -780,13 +768,6 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) > } else { > dump_syscall(env); > } > - > - /* > - * We need to correct the NIP which in this case is supposed > - * to point to the next instruction > - */ > - env->nip += 4; > - > /* > * The Virtual Open Firmware (VOF) relies on the 'sc 1' > * instruction to communicate with QEMU. The pegasos2 machine > @@ -932,13 +913,6 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp) > } else { > dump_syscall(env); > } > - > - /* > - * We need to correct the NIP which in this case is supposed > - * to point to the next instruction > - */ > - env->nip += 4; > - > /* > * The Virtual Open Firmware (VOF) relies on the 'sc 1' > * instruction to communicate with QEMU. The pegasos2 machine > @@ -1098,12 +1072,6 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp) > break; > case POWERPC_EXCP_SYSCALL: /* System call exception */ > dump_syscall(env); > - > - /* > - * We need to correct the NIP which in this case is supposed > - * to point to the next instruction > - */ > - env->nip += 4; > break; > case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */ > case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */ > @@ -1427,13 +1395,6 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp) > } else { > dump_syscall(env); > } > - > - /* > - * We need to correct the NIP which in this case is supposed > - * to point to the next instruction > - */ > - env->nip += 4; > - > /* "PAPR mode" built-in hypercall emulation */ > if (lev == 1 && books_vhyp_handles_hcall(cpu)) { > PPCVirtualHypervisorClass *vhc = > diff --git a/target/ppc/translate.c b/target/ppc/translate.c > index d87aae0cc4..a3ac8c3d0e 100644 > --- a/target/ppc/translate.c > +++ b/target/ppc/translate.c > @@ -4575,15 +4575,13 @@ static void gen_hrfid(DisasContext *ctx) > #endif > static void gen_sc(DisasContext *ctx) > { > - uint32_t lev; > - > /* > * LEV is a 7-bit field, but the top 6 bits are treated as a reserved > * field (i.e., ignored). ISA v3.1 changes that to 5 bits, but that is > * for Ultravisor which TCG does not support, so just ignore the top 6. > */ > - lev = (ctx->opcode >> 5) & 0x1; > - gen_exception_err(ctx, POWERPC_SYSCALL, lev); > + uint32_t lev = (ctx->opcode >> 5) & 0x1; > + gen_exception_err_nip(ctx, POWERPC_SYSCALL, lev, ctx->base.pc_next); > } > > #if defined(TARGET_PPC64)
On Wed Feb 28, 2024 at 1:08 AM AEST, BALATON Zoltan wrote: > Most exceptions are raised with nip pointing to the faulting > instruction but the sc instruction generating a syscall exception > leaves nip pointing to next instruction. Fix gen_sc to not use > gen_exception_err() which sets nip back but correctly set nip to > pc_next so we don't have to patch this in the exception handlers. These syscall patches are causing the catch-syscalls test on ppc user to fail, e.g., https://gitlab.com/npiggin/qemu/-/jobs/6375591392 So I dropped them. I didn't have any time to see why. The rest of the series are fine though. Thanks, Nick > > Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> > --- > target/ppc/excp_helper.c | 43 ++-------------------------------------- > target/ppc/translate.c | 6 ++---- > 2 files changed, 4 insertions(+), 45 deletions(-) > > diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c > index fba6e03d18..f1e62d9878 100644 > --- a/target/ppc/excp_helper.c > +++ b/target/ppc/excp_helper.c > @@ -116,7 +116,7 @@ static void dump_syscall(CPUPPCState *env) > ppc_dump_gpr(env, 0), ppc_dump_gpr(env, 3), > ppc_dump_gpr(env, 4), ppc_dump_gpr(env, 5), > ppc_dump_gpr(env, 6), ppc_dump_gpr(env, 7), > - ppc_dump_gpr(env, 8), env->nip); > + ppc_dump_gpr(env, 8), env->nip - 4); > } > > static void dump_hcall(CPUPPCState *env) > @@ -131,7 +131,7 @@ static void dump_hcall(CPUPPCState *env) > ppc_dump_gpr(env, 7), ppc_dump_gpr(env, 8), > ppc_dump_gpr(env, 9), ppc_dump_gpr(env, 10), > ppc_dump_gpr(env, 11), ppc_dump_gpr(env, 12), > - env->nip); > + env->nip - 4); > } > > #ifdef CONFIG_TCG > @@ -516,12 +516,6 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp) > break; > case POWERPC_EXCP_SYSCALL: /* System call exception */ > dump_syscall(env); > - > - /* > - * We need to correct the NIP which in this case is supposed > - * to point to the next instruction > - */ > - env->nip += 4; > break; > case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */ > trace_ppc_excp_print("FIT"); > @@ -632,12 +626,6 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp) > break; > case POWERPC_EXCP_SYSCALL: /* System call exception */ > dump_syscall(env); > - > - /* > - * We need to correct the NIP which in this case is supposed > - * to point to the next instruction > - */ > - env->nip += 4; > break; > case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */ > case POWERPC_EXCP_DECR: /* Decrementer exception */ > @@ -780,13 +768,6 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) > } else { > dump_syscall(env); > } > - > - /* > - * We need to correct the NIP which in this case is supposed > - * to point to the next instruction > - */ > - env->nip += 4; > - > /* > * The Virtual Open Firmware (VOF) relies on the 'sc 1' > * instruction to communicate with QEMU. The pegasos2 machine > @@ -932,13 +913,6 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp) > } else { > dump_syscall(env); > } > - > - /* > - * We need to correct the NIP which in this case is supposed > - * to point to the next instruction > - */ > - env->nip += 4; > - > /* > * The Virtual Open Firmware (VOF) relies on the 'sc 1' > * instruction to communicate with QEMU. The pegasos2 machine > @@ -1098,12 +1072,6 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp) > break; > case POWERPC_EXCP_SYSCALL: /* System call exception */ > dump_syscall(env); > - > - /* > - * We need to correct the NIP which in this case is supposed > - * to point to the next instruction > - */ > - env->nip += 4; > break; > case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */ > case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */ > @@ -1427,13 +1395,6 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp) > } else { > dump_syscall(env); > } > - > - /* > - * We need to correct the NIP which in this case is supposed > - * to point to the next instruction > - */ > - env->nip += 4; > - > /* "PAPR mode" built-in hypercall emulation */ > if (lev == 1 && books_vhyp_handles_hcall(cpu)) { > PPCVirtualHypervisorClass *vhc = > diff --git a/target/ppc/translate.c b/target/ppc/translate.c > index d87aae0cc4..a3ac8c3d0e 100644 > --- a/target/ppc/translate.c > +++ b/target/ppc/translate.c > @@ -4575,15 +4575,13 @@ static void gen_hrfid(DisasContext *ctx) > #endif > static void gen_sc(DisasContext *ctx) > { > - uint32_t lev; > - > /* > * LEV is a 7-bit field, but the top 6 bits are treated as a reserved > * field (i.e., ignored). ISA v3.1 changes that to 5 bits, but that is > * for Ultravisor which TCG does not support, so just ignore the top 6. > */ > - lev = (ctx->opcode >> 5) & 0x1; > - gen_exception_err(ctx, POWERPC_SYSCALL, lev); > + uint32_t lev = (ctx->opcode >> 5) & 0x1; > + gen_exception_err_nip(ctx, POWERPC_SYSCALL, lev, ctx->base.pc_next); > } > > #if defined(TARGET_PPC64)
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index fba6e03d18..f1e62d9878 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -116,7 +116,7 @@ static void dump_syscall(CPUPPCState *env) ppc_dump_gpr(env, 0), ppc_dump_gpr(env, 3), ppc_dump_gpr(env, 4), ppc_dump_gpr(env, 5), ppc_dump_gpr(env, 6), ppc_dump_gpr(env, 7), - ppc_dump_gpr(env, 8), env->nip); + ppc_dump_gpr(env, 8), env->nip - 4); } static void dump_hcall(CPUPPCState *env) @@ -131,7 +131,7 @@ static void dump_hcall(CPUPPCState *env) ppc_dump_gpr(env, 7), ppc_dump_gpr(env, 8), ppc_dump_gpr(env, 9), ppc_dump_gpr(env, 10), ppc_dump_gpr(env, 11), ppc_dump_gpr(env, 12), - env->nip); + env->nip - 4); } #ifdef CONFIG_TCG @@ -516,12 +516,6 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp) break; case POWERPC_EXCP_SYSCALL: /* System call exception */ dump_syscall(env); - - /* - * We need to correct the NIP which in this case is supposed - * to point to the next instruction - */ - env->nip += 4; break; case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */ trace_ppc_excp_print("FIT"); @@ -632,12 +626,6 @@ static void powerpc_excp_6xx(PowerPCCPU *cpu, int excp) break; case POWERPC_EXCP_SYSCALL: /* System call exception */ dump_syscall(env); - - /* - * We need to correct the NIP which in this case is supposed - * to point to the next instruction - */ - env->nip += 4; break; case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */ case POWERPC_EXCP_DECR: /* Decrementer exception */ @@ -780,13 +768,6 @@ static void powerpc_excp_7xx(PowerPCCPU *cpu, int excp) } else { dump_syscall(env); } - - /* - * We need to correct the NIP which in this case is supposed - * to point to the next instruction - */ - env->nip += 4; - /* * The Virtual Open Firmware (VOF) relies on the 'sc 1' * instruction to communicate with QEMU. The pegasos2 machine @@ -932,13 +913,6 @@ static void powerpc_excp_74xx(PowerPCCPU *cpu, int excp) } else { dump_syscall(env); } - - /* - * We need to correct the NIP which in this case is supposed - * to point to the next instruction - */ - env->nip += 4; - /* * The Virtual Open Firmware (VOF) relies on the 'sc 1' * instruction to communicate with QEMU. The pegasos2 machine @@ -1098,12 +1072,6 @@ static void powerpc_excp_booke(PowerPCCPU *cpu, int excp) break; case POWERPC_EXCP_SYSCALL: /* System call exception */ dump_syscall(env); - - /* - * We need to correct the NIP which in this case is supposed - * to point to the next instruction - */ - env->nip += 4; break; case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */ case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */ @@ -1427,13 +1395,6 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp) } else { dump_syscall(env); } - - /* - * We need to correct the NIP which in this case is supposed - * to point to the next instruction - */ - env->nip += 4; - /* "PAPR mode" built-in hypercall emulation */ if (lev == 1 && books_vhyp_handles_hcall(cpu)) { PPCVirtualHypervisorClass *vhc = diff --git a/target/ppc/translate.c b/target/ppc/translate.c index d87aae0cc4..a3ac8c3d0e 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -4575,15 +4575,13 @@ static void gen_hrfid(DisasContext *ctx) #endif static void gen_sc(DisasContext *ctx) { - uint32_t lev; - /* * LEV is a 7-bit field, but the top 6 bits are treated as a reserved * field (i.e., ignored). ISA v3.1 changes that to 5 bits, but that is * for Ultravisor which TCG does not support, so just ignore the top 6. */ - lev = (ctx->opcode >> 5) & 0x1; - gen_exception_err(ctx, POWERPC_SYSCALL, lev); + uint32_t lev = (ctx->opcode >> 5) & 0x1; + gen_exception_err_nip(ctx, POWERPC_SYSCALL, lev, ctx->base.pc_next); } #if defined(TARGET_PPC64)
Most exceptions are raised with nip pointing to the faulting instruction but the sc instruction generating a syscall exception leaves nip pointing to next instruction. Fix gen_sc to not use gen_exception_err() which sets nip back but correctly set nip to pc_next so we don't have to patch this in the exception handlers. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> --- target/ppc/excp_helper.c | 43 ++-------------------------------------- target/ppc/translate.c | 6 ++---- 2 files changed, 4 insertions(+), 45 deletions(-)